IDT72V3650 Integrated Device Technology, IDT72V3650 Datasheet - Page 31

• Manufacturer Part Number: IDT72V3650
• Description: 2k X 36 Supersync Ii Fifo, 3.3v
• Manufacturer: Integrated Device Technology

NOTES:
1. Retransmit setup is complete after OR returns LOW.
2. No more than D - 2 words may be written to the FIFO between Reset (Master or Partial) and Retransmit setup. Therefore, IR will be LOW throughout the Retransmit setup procedure.
3. OE = LOW.
4. W
5. There must be at least two words written to the FIFO before a Retransmit operation can be invoked.
6. RM is set HIGH during MRS.
Q
IDT72V3640/50/60/70/80/90 3.3V HIGH DENSITY SUPERSYNC II
1,024 x 36, 2,048 x 36, 4,096 x 36, 8,192 x 36, 16,384 x 36 and 32,768 x 36
WCLK
RCLK
0
D = 1,025 for the IDT72V3640, 2,049 for the IDT72V3650, 4,097 for the IDT72V3660, 8,193 for the IDT72V3670, 16,385 for the IDT72V3680 and 32,769 for the IDT72V3690.
WEN
REN
- Q
PAE
PAF
1
OR
, W
RT
HF
n
2
, W
t
ENS
3
= first, second and third words written to the FIFO after Master Reset.
W
x
t
ENH
t
ENS
t
RTS
t
RTS
W
x+1
t
t
REF
t
ENH
HF
t
SKEW2
Figure 12. Retransmit Timing (FWFT Mode)
1
2
t
PAFS
1
t
A
TM
t
REF
31
36-BIT FIFO
t
ENS
W
1
(4)
2
t
A
t
PAES
W
2
(4)
COMMERCIAL AND INDUSTRIAL
3
t
A
TEMPERATURE RANGES
W
3
(4)
APRIL 6, 2006
4
t
A
4667 drw17
t
ENH
W
4