IDT70261S Integrated Device Technology, IDT70261S Datasheet - Page 12

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IDT70261S

Manufacturer Part Number
IDT70261S
Description
High-speed 16k X 16 Dual-port Static Ram With Interrupt
Manufacturer
Integrated Device Technology
Datasheet

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NOTES:
1. To ensure that the earlier of the two ports wins. t
2. CE
3. OE = V
4. If M/S = V
5. All timing is the same for left and right ports. Port "A" may be either the left or right port. Port "B" is the port opposite from port "A".
NOTES:
1. t
2. BUSY is asserted on port "B" blocking R/W
3. t
DATA
IDT70261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
DATA
WH
WB
ADDR
ADDR
BUSY
L
must be met for both BUSY input (SLAVE) and output (MASTER).
is only for the “SLAVE” version.
= CE
R/
OUT "B"
IN "A"
IL
W
for the reading port.
R
"A"
"A"
"B"
"B"
IL
= V
(slave), BUSY is an input. Then for this example BUSY
IL.
t
APS
BUSY
(1)
R/
R/
W
W
"A"
"B"
"B"
"B"
, until BUSY
APS
is ignored for M/S = V
t
WB
"B"
(3)
goes HIGH.
t
BAA
"A"
BUSY
= V
MATCH
IH
IL
t
6.42
WC
t
and BUSY
(SLAVE).
12
WP
(2)
"B"
S
input is shown above.
t
WP
Industrial and Commercial Temperature Ranges
t
MATCH
DW
t
WDD
VALID
t
WH
BUSY
(1)
t
3039 drw 12
DDD
(3)
t
BDA
,
t
DH
S
3039 drw 11
t
BDD
VALID

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