SA8281 Mitel Networks Corporation, SA8281 Datasheet - Page 3
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SA8281
Manufacturer Part Number
SA8281
Description
Three-Phase PWM Waveform Generator
Manufacturer
Mitel Networks Corporation
Datasheet
1.SA8281.pdf
(14 pages)
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FUNCTIONAL DESCRIPTION
uniform or ‘double-edged’ regular sampling of the waveform
stored in the internal ROM as illustrated in Fig. 3.
(assuming the maximum clock frequency of 12.5MHz is used),
enabling ultrasonic operation for noise critical applications. With
12.5MHz clock, power frequency ranges of up to 4kHz are
possible, with the actual output frequency resolved to 12-bit
accuracy within the chosen range in order to give precise motor
speed control and smooth frequency changing. The output phase
sequence of the PWM outputs can also be changed to allow both
forward and reverse motor operation.
characteristics by defining the minimum allowable pulse width
(the SA828 will delete all shorter pulses from the ‘pure’ PWM pulse
train) and the pulse delay (underlap) time, without the need for
external circuitry. This gives cost advantages in both component
savings and in allowing the same PWM circuitry to be used for
control of a number of different motor drive circuits simply by
changing the microprocessor software.
overmodulation option to assist in rapid motor braking. Alternatively,
braking may be implemented by setting the rotational speed to
0Hz. This is termed ‘DC injection braking’, in which the rotation of
the motor is opposed by allowing DC to flow in the windings.
overriding the microprocessor control in the event of an emergency.
be used in conjunction with the ZPP signals to provide feedback
of the actual rotational speed from the rotor. This is of particular
An asynchronous method of PWM generation is used with
The triangle carrier wave frequency is selectable up to 24kHz
PWM output pulses can be ‘tailored’ to the inverter
Power frequency amplitude control is also provided with an
A trip input allows the PWM outputs to be shut down immediately,
The Waveform Sampling Synchronisation (WSS) output may
INTERFACE
MOTEL
SYSTEM
AD
CLOCK
BUS
0
RST
-AD
CS
7
8
DEMULTIPLEXER
CONTROL
DIVIDER
CLOCK
BUS
BUS
R0
R1
R2
R3
R4
INITIALISATION
REGISTER
REGISTER
CONTROL
24-BIT
24-BIT
GENERATOR
Fig. 2 SA828 internal block diagram
ADDRESS
WAVEFORM
ROM
CONTROL
PHASING
O/Ps WSS
ZPP
LOGIC
AND
use in slip compensated systems.
generator as part of a switched-mode power supply (SMPS) or of
an uninterruptible power supply (UPS). In such applications the
high carrier frequency allows a very small switching transformer
to be used.
MICROPROCESSOR INTERFACE
means of a multiplexed bus of the MOTEL format. This interface
bus has the ability to adapt itself automatically to the format and
timing of both MOTorola and IntEL interface buses (hence MOTEL).
Internally, the detection circuitry latches the status of the DS/RD
line when AS/ALE goes high. If the result is high then the Intel
mode is used; if the result is low then the Motorola mode is used.
This procedure is carried out each time that AS/ALE goes high. In
practice this mode selection is transparent to the user. For bus
connection and timing information refer to the description relevant
to the microprocessor/controller being used.
etc. and microcontrollers such as the 8051, 8052 and 6805 are all
compatible with the interface on the SA828. This interface consists
of 8 data lines, AD
multiplexed to carry both the address and data information, 3 bus
control lines, labelled WR,RD and ALE in Intel mode and R/W, DS
and AS in Motorola mode, and a Chip Select input, CS, which
allows the SA828 to share the same bus as other microprocessor
peripherals. It should be noted that all bus timings are derived from
the microprocessor and are independent of the SA828 clock
input.
Other possible SA828 applications are as a 3-phase waveform
The SA828 interfaces to the controlling microprocessor by
Industry standard microprocessors such as the 8085, 8088,
DELETION
DELETION
DELETION
PULSE
PULSE
PULSE
YELLOW PHASE
BLUE PHASE
RED PHASE
0
- AD
CIRCUIT
CIRCUIT
CIRCUIT
DELAY
DELAY
DELAY
PULSE
PULSE
PULSE
7
(write-only in this instance), which are
LATCH
TRIP
RPHB
YPHB
BPHB
RPHT
YPHT
BPHT
TRIP
TRIP
SET
SA828
3