ICL7104 Intersil, ICL7104 Datasheet - Page 3

• Manufacturer Part Number: ICL7104
• Description: 14-Bit/16-Bit/ Microprocessor- Compatible/ 2-Chip/ A/D Converter
• Manufacturer: Intersil

Pin Descriptions
PIN NO.
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
1
2
3
4
5
6
7
8
9
SYMBOL
CLOCK3
BIT 16
BIT 14
BIT 15
BIT 13
BIT 14
BIT 12
BIT 13
BIT 11
BIT 12
BIT 10
BIT 11
BIT 10
MBEN
HBEN
HBEN
LBEN
STTS
BIT 9
BIT 9
BIT 8
BIT 7
BIT 6
BIT 5
BIT 4
BIT 3
BIT 2
BIT 1
GND
POL
V++
OR
NC
NC
OPTION
-16
-14
-16
-14
-16
-14
-16
-14
-16
-14
-16
-14
-16
-14
-16
-14
-16
-14
-16
-14
ICL8052/ICL7104, ICL8068/ICL7104
Positive Supply Voltage: Nominally +15V.
Digital Ground: 0V, ground return.
Status Output: HI during integrate and deintegrate until data is latched. LO when analog section
is in auto-zero configuration.
Polarity: Three-state output. HI for positive input.
Over Range: Three-state output.
Most Significant Bit (MSB).
DATA Bits: Three-state outputs. See Table 3 for format of ENABLES and bytes. HIGH = true.
Least Significant Bit (LSB).
LOW BYTE ENABLE: If not in handshake mode (see pin 27) when LO (with CE/LD, pin 30)
activates low-order byte outputs, BITS 1-8. When in handshake mode (see pin 27), serves as a
low byte flag output. See Figures 11, 12, 13.
MID BYTE ENABLE: Activates Bits 9-16, see LBEN (pin 22)
HIGH BYTE ENABLE: Activates Bits 9-14, POL, OR, see LBEN (pin 22)
HIGH BYTE ENABLE: Activates POL, OR, see LBEN (pin 22).
RC oscillator pin: Can be used as clock output.
5-8
DESCRIPTION