TDA8961 Philips Semiconductors, TDA8961 Datasheet - Page 15

• Manufacturer Part Number: TDA8961
• Description: ATSC/NTSC digital TV front-end chipset
• Manufacturer: Philips Semiconductors

Philips Semiconductors
S
Figure 7 shows the structure of the so-called transport
stream packet header of which only the first two bytes are
significant to the TDA8961. The first byte in each header is
the sync byte which must have the same value for all
packets in accordance with the MPEG-2 standard
specification. The TDA8961 sets the sync byte for each
outgoing transport stream packet to 47H. The MSB of the
second byte in the header is the
transport_error_indicator bit. It is asserted when the Reed
Solomon decoder is unable to correct all errors in the
transport stream packet and indicates that the packet
contains invalid data.
To perform bit error rate (BER) measurements, the
external channel decoder generates a pseudo-random bit
sequence (PRBS) in the last 187 bytes of each transport
stream packet.The same PRBS signal is generated within
the BER tester which compares it with the PRBS in each
transport packet and records any mismatch as an error.
It should be noted that during BER measurements, the
TDA8961 must not be allowed to set the
transport_error_indicator bit. This option is possible using
I
transport error interface bit is not allowed to indicate an
error. If bit FTEI is set, the Reed Solomon decoder is
allowed to set the transport_error_indicator bit according
to the result of the error correction process. This is the
default setting.
2000 May 19
2
handbook, full pagewidth
YNC BYTE AND TRANSPORT STREAM ERROR INDICATOR
C-bus bit FTEI (see Table 14). If bit FTEI is not set, the
ATSC Digital Terrestrial TV
demodulator/decoder
transport_error_indicator
sync byte
adaptation field
Fig.7 Transport packet header structure.
(if present)
MSB
0 0
188 bytes
1
transport packet header
15
0
S
The TDA8961 can be used with another channel decoder
without requiring the transport stream outputs from either
decoder to be selected by an external switch. This
configuration requires the serial transport stream output
from the other channel decoder to be connected to the
serial transport stream input of the TDA8961. When the
system requires the transport stream from the other
channel decoder, the TDA8961 internally connects
PDIERR to PDOERR, PDIVAL to PDOVAL, PDICLK to
PDOCLK, PDISYNC to PDOSYNC and PDI0 to PDO0
allowing the transport stream from the other channel
decoder to pass through the TDA8961. This pass-through
mode is enabled by setting the value of I
bits to 11 (see Table 14).
ITU656
Figure 1 shows the tuner output connected to the
TDA8980 which processes the IF and then outputs an 8-bit
wide MPEG-2 transport stream to the TDA8961 where it is
further processed before it is output to the video processor.
This arrangement allows one system to receive both
analog and digital broadcasts. When analog signals are
received, the TDA8980 supplies an ITU656 format video
stream to the TDA8961 input interface comprising
pins ADIN9 to ADIN0 and ADCLK. The ITU656 format
uses 8-bit data and a 27 MHz clock signal.
ERIAL TRANSPORT STREAM INPUT
0
0
(if present)
BYPASS MODE
payload
1
1
LSB
1
1st byte
4th byte
MGR605
Objective specification
2
TDA8961
C-bus TSMODE