NCP5314 ON Semiconductor, NCP5314 Datasheet - Page 18
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NCP5314
Manufacturer Part Number
NCP5314
Description
Two/Three/Four-Phase Buck CPU Controller
Manufacturer
ON Semiconductor
Datasheet
1.NCP5314.pdf
(28 pages)
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will be a 120 degree delay between pulses. The phase firing
order will become 1−2−3.
First, the designer must choose the proper phases. Two phase
operation must use phase 2 and 4 by tying CS1N, CS1P,
CS3N and CS3P to ground. This will then use phase 2 and
1. Setting Converter Operating Frequency
operating frequency for each phase of the converter. The
frequency can be set for either the three phase or four phase
mode by using Figure 7, “Oscillator Frequency versus Total
R
frequency and the number of phases, use the figure to
determine the necessary resistance. If two phase operation
is desired, use the value given for four phase operation.
voltage can be used as the reference for the overcurrent limit
set point on the I
appropriate division ratio to give the desired I
and total resistance to set the operating frequency. Since
loading by the I
will not be affected.
2. Output Capacitor Selection
inductor and provide a low impedance for transient load
current changes. Typically, microprocessor applications
require both bulk (electrolytic, tantalum) and low
impedance, high frequency (ceramic) types of capacitors.
The bulk capacitors provide “hold up” during transient
loading. The low impedance capacitors reduce steady−state
ripple and bypass the bulk capacitance when the output
current changes very quickly. The microprocessor
manufacturers usually specify a minimum number of
ceramic capacitors. The designer must determine the
number of bulk capacitors.
Table 1. Description of Fault Logic
Overvoltage Lockout
Enable Low
Module Overcurrent Limit
DAC Code = 11111x
V
PWRLS Out of Range
OSC
Two− and single−phase operation may be realized as well.
The total resistance from R
The voltage from R
The output capacitors filter the current from the output
REF
Undervoltage Lockout
Value.” After choosing the desired operating
Faults
LIM
LIM
pin is very small, the frequency selection
pin. Design a voltage divider with the
OSC
is closely regulated at 1 V. This
OSC
Switching
to ground sets the
Stop
Yes
Yes
Yes
Yes
Yes
No
APPLICATIONS INFORMATION
LIM
Depends on output voltage level
Depends on output voltage level
Depends on output voltage level
Depends on output voltage level
voltage
http://onsemi.com
NCP5314
PWRGD Level
18
Low
Low
4 as the gate drivers. The other gate drives may switch, so
leave them unconnected.
as the switch controller. Connect CS2P and CS2N pins to the
current sense capacitor and the gate drive to the driver IC.
Tie all other CSxx pins together and connect them to ground.
peak transient requirements. The formula below can be used
to provide a starting point for the minimum number of bulk
capacitors (N
determine the voltage change during a load transient
according to:
DV O,MAX + (DI O,MAX Dt) @ ESL ) DI O,MAX @ ESR
ESL of their components and the inductance added by the
PCB traces is highly dependent on the layout and routing.
Therefore, it is necessary to start a design with slightly more
than the minimum number of bulk capacitors and perform
transient testing or careful modeling/simulation to
determine the final number of bulk capacitors.
VID” (DVID), in which the VID codes are stepped up or
down to a new desired output voltage. Due to the timing
requirements at which the output must be in regulation, the
output capacitor selection becomes more complicated. The
ideal output capacitor selection has low ESR and low
capacitance. Too much output capacitance will make it
difficult to meet DVID timing specifications; too much ESR
will complicate the transient solution. The Sanyo 4SP560M
and Panasonic EEU−FL provide a good balance of
capacitance vs. ESR.
Single phase is best accomplished by using only Phase 2
Choose the number of bulk output capacitors to meet the
In reality, both the ESR and ESL of the bulk capacitors
Unfortunately, capacitor manufacturers do not specify the
The latest Intel processor specifications discuss “dynamic
N OUT,MIN + ESR per capacitor @
Results
OUT,MIN
Enable
Driver
High
High
Low
Low
Low
Low
):
Characteristics
Not Affected
−0.3 mA
−0.3 mA
−0.3 mA
−0.3 mA
−0.3 mA
SS
DV O,MAX
DI O,MAX
Reset Method
Not Affected
Not Affected
Power On
Power On
Power On
Valid VID
(1)
(2)