MC33411B Motorola, MC33411B Datasheet - Page 31

• Manufacturer Part Number: MC33411B
• Description: (MC33411A/B) ANALOG CORDLESS PHONE BASEBAND
• Manufacturer: Motorola

Loop Filter Characteristics
fundamental loop characteristics, such as capture range,
loop bandwidth, lock–up time, and transient response are
controlled externally by loop filtering.
(PLL).
represented as follows:
800 A/4 . More details about performance of different type
PLL loops, refer to Motorola application note AN535.
A current output, type 2 filter will be used in this discussion
since it has the advantage of improved step response,
velocity, and acceleration.
follows:
integrator, providing the type 2 response, and filters the
discrete current steps from the phase detector output. The
function of the additional components R2 and C2 is to create
a pole and a zero (together with C1) around the 0 dB point of
the open loop gain. This will create sufficient phase margin
for stable loop operation.
displayed in the form of a Bode plot. Since there are two
integrating functions in the loop, originating from the loopfilter
and the VCO gain, the open loop gain response follows a
second order slope (–40 dB/dec) creating a phase of –180
degrees at the lower and higher frequencies. The filter
characteristic needs to be determined such that it is adding a
fi
MOTOROLA RF/IF DEVICE DATA
Let’s consider the following discussion on loop filters. The
Figure 46 is the general model for a Phase Lock Loop
Where:
From control theory the loop transfer function can be
K pd can be either expressed as being 200
The loop filter can take the form of a simple low pass filter.
The type 2 low pass filter discussed here is represented as
From Figure 47, capacitor C1 forms an additional
In Figure 48, the open loop gain and the phase is
Detector (K pd )
Phase
K pd = Phase Detector Gain Constant
K f = Loop Filter Transfer Function
K o = VCO Gain Constant
K n = Divide Ratio (N)
fi = Input frequency
fo = Output frequency
fo/N = Feedback frequency divided by N
with Additional Integrating Element
A
K
Figure 47. Loop Filter
From
Phase
Detector
Figure 46. PLL Model
pd
K n
K
Divider
Filter
f
(K n )
(K f )
K o
C1
Open loop gain
R2
C2
VCO
(K o )
To VCO
A/4
MC33411A/B
fo
or
pole and a zero around the 0 dB point to guarantee sufficient
phase margin in this design (Qp in Figure 48).
expressed as:
the Bode plot can now be defined as:
zero in order to assure maximum phase margin occurs at p
(see also Figure 48). This provides an expression for p :
The open loop gain including the filter response can be
The two time constants creating the pole and the zero in
By substituting equation (5) into (4), it follows:
The phase margin (phase + 180) is thus determined by:
At = p , the derivative of the phase margin may be set to
Or rewritten:
By substituting into equation (7), solve for T2:
0
A
openloop
Open Loop Gain
A
openloop
dQ p
Q p
d w
T1
Figure 48. Bode Plot of Gain and
Phase in Open Loop Condition
+
+
+
arctan( w T2)–arctan( w T1)
C1
R2C1C2
0
T2
j w K n j w 1
+
+
w
+
T1
+
1
C2
K
w 2 C1K n T2
w p
tan
pd
K
+
Phase
T2
( w T2)
pd
K o (1
+
w p 2 T2
K o T1
Q p
2
w p
1
T2T1
2
1
–
T2
j w R2C1C2
p
j w (R2C2)
1
4
Q p
+
C1 C2
1
1
T1
( w T1)
R2C2
j w T2
j w T1
)
2
–90
–180
(10)
31
(11)
(4)
(5)
(6)
(7)
(8)
(9)
0