74ACQ374 Fairchild Semiconductor, 74ACQ374 Datasheet
74ACQ374
Manufacturer Part Number
74ACQ374
Description
Quiet Series Octal D-Type Flip-Flop with 3-STATE Outputs
Manufacturer
Fairchild Semiconductor
Datasheet
1.74ACQ374.pdf
(12 pages)
©1989 Fairchild Semiconductor Corporation
74ACQ374, 74ACTQ374 Rev. 1.3
74ACQ374, 74ACTQ374
Quiet Series™ Octal D-Type Flip-Flop with 3-STATE
Outputs
Features
■
■
■
■
■
■
■
■
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
FACT™, Quiet Series™, FACT Quiet Series™, and GTO™ are trademarks of Fairchild Semiconductor Corporation.
74ACQ374SC
74ACQ374SJ
74ACTQ374SC
74ACTQ374SJ
74ACTQ374QSC
Order Number
I
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Guaranteed pin-to-pin skew AC performance
Improved latch-up immunity
Buffered positive edge-triggered clock
3-STATE outputs drive bus lines or buffer memory
address registers
Outputs source/sink 24mA
Faster prop delays than the standard AC/ACT374
CC
and I
OZ
reduced by 50%
Package
Number
MQA20
M20D
M20D
M20B
M20B
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300” Wide
Body
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Quarter Size Outline Package (QSOP), JEDEC MO-137, 0.150” Wide
General Description
The ACQ/ACTQ374 is a high-speed, low-power octal
D-type flip-flop featuring separate D-type inputs for each
flip-flop and 3-STATE outputs for bus-oriented applica-
tions. A buffered Clock (CP) and Output Enable (OE) are
common to all flip-flops.
The ACQ/ACTQ374 utilizes FACT Quiet Series™ tech-
nology to guarantee quiet output switching and improve
dynamic threshold performance. FACT Quiet Series fea-
tures GTO™ output control and undershoot corrector in
addition to a split ground bus for superior performance.
Pin Description
D
CP
OE
O
0
Pin Names
0
–D
–O
Package Description
7
7
Data Inputs
Clock Pulse Input
3-STATE Output Enable Input
3-STATE Outputs
Description
www.fairchildsemi.com
April 2007
tm
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