74ACQ646SC Fairchild Semiconductor, 74ACQ646SC Datasheet

IC TXRX/REGISTER 3ST 8BIT 24SOIC

74ACQ646SC

Manufacturer Part Number
74ACQ646SC
Description
IC TXRX/REGISTER 3ST 8BIT 24SOIC
Manufacturer
Fairchild Semiconductor
Series
74ACQr
Datasheet

Specifications of 74ACQ646SC

Logic Type
Registered Transceiver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
24-SOIC (7.5mm Width)
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
© 2000 Fairchild Semiconductor Corporation
74ACQ646SC
74ACQ464ASPC
74ACTQ646SC
74ACTQ464ASPC
74ACQ646 • 74ACTQ646
Quiet Series
with 3-STATE Outputs
General Description
The ACQ/ACTQ646 consist of registered bus transceiver
circuits, with outputs, D-type flip-flops, and control circuitry
providing multiplexed transmission of data directly from the
input bus or from the internal storage registers. Data on the
A or B bus will be loaded into the respective registers on
the LOW-to-HIGH transition of the appropriate clock pin
(CPAB or CPBA). The four fundamental handling functions
available are illustrated in Figure 1, Figure 2, Figure 3 and
Figure 4.
The ACQ/ACTQ utilizes Fairchild Quiet Series
ogy to guarantee quiet output switching and improved
dynamic threshold performance. FACT Quiet Series
tures GTO
addition to a split ground bus for superior performance.
Ordering Code:
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering code.
Connection Diagram
FACT , Quiet Series , FACT Quiet Series
Order Number
output control and undershoot corrector in
Package Number
M24B
M24B
N24C
N24C
Octal Transceiver/Register
and GTO
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
are trademarks of Fairchild Semiconductor Corporation
DS010635
technol-
fea-
Features
Pin Descriptions
Guaranteed simultaneous switching noise level and
dynamic threshold performance
Guaranteed pin-to-pin skew AC performance
Independent registers for A and B busses
Multiplexed real-time and stored data transfers
300 mil slim dual-in-line package
Outputs source/sink 24 mA
Faster prop delays than the standard AC/ACT646
A
B
CPAB, CPBA
SAB, SBA
G
DIR
0
0
–A
–B
Pin Names
Package Description
7
7
Data Register A Inputs
Data Register A Outputs
Data Register B Inputs
Data Register B Outputs
Clock Pulse Inputs
Transmit/Receive Inputs
Output Enable Input
Direction Control Input
January 1990
Revised September 2000
Descriptions
www.fairchildsemi.com

Related parts for 74ACQ646SC

74ACQ646SC Summary of contents

Page 1

... Ordering Code: Order Number Package Number 74ACQ646SC M24B 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide 74ACQ464ASPC N24C 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide ...

Page 2

Logic Symbols Function Table Inputs G DIR CPAB CPBA SAB  ...

Page 3

Real Time Transfer A-Bus to B-Bus FIGURE 1. Storage from Bus to Register FIGURE 3. Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ...

Page 4

Absolute Maximum Ratings Supply Voltage ( Input Diode Current ( 0. 0. Input Voltage ( Output Diode Current ( ...

Page 5

DC Electrical Characteristics for ACQ Symbol Parameter V Quiet Output OLV Minimum Dynamic Minimum HIGH Level IHD Dynamic Input Voltage V Maximum LOW Level ILD Dynamic Input Voltage Note 3: Maximum of 8 outputs loaded; thresholds on ...

Page 6

AC Electrical Characteristics for ACQ Symbol Parameter t Propagation Delay PLH Bus to Bus t Propagation Delay PHL Bus to Bus t Propagation Delay PLH Clock to Bus t Propagation Delay PHL Clock to Bus t Propagation Delay PLH SBA ...

Page 7

AC Electrical Characteristics for ACTQ Symbol Parameter t Propagation Delay PLH t Clock to Bus PHL t Propagation Delay PLH t Bus to Bus PHL t Propagation Delay PLH t SBA or SAB PHL n n ...

Page 8

FACT Noise Characteristics The setup of a noise characteristics measurement is critical to the accuracy and repeatability of the tests. The following is a brief description of the setup used to measure the noise characteristics of FACT. Equipment: Hewlett Packard ...

Page 9

Physical Dimensions inches (millimeters) unless otherwise noted 24-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300 Wide Package Number M24B 9 www.fairchildsemi.com ...

Page 10

Physical Dimensions inches (millimeters) unless otherwise noted (Continued) 24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and Fairchild reserves the right ...

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