74AC175SC Fairchild Semiconductor, 74AC175SC Datasheet

IC FLIP FLOP D TYPE QUAD 16SOIC

74AC175SC

Manufacturer Part Number
74AC175SC
Description
IC FLIP FLOP D TYPE QUAD 16SOIC
Manufacturer
Fairchild Semiconductor
Series
74ACr
Type
D-Type Busr
Datasheet

Specifications of 74AC175SC

Function
Master Reset
Output Type
Differential
Number Of Elements
1
Number Of Bits Per Element
4
Frequency - Clock
244MHz
Delay Time - Propagation
7ns
Trigger Type
Positive Edge
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Surface Mount
Package / Case
16-SOIC (3.9mm Width)
Number Of Circuits
4
Logic Family
74AC
Logic Type
D-Type Flip-Flop
Polarity
Inverting/Non-Inverting
Input Type
Single-Ended
Propagation Delay Time
13 ns
High Level Output Current
- 24 mA
Low Level Output Current
24 mA
Supply Voltage (max)
6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
Supply Voltage (min)
2 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AC175SCX
Manufacturer:
FAIRCHILD
Quantity:
4 324
©1988 Fairchild Semiconductor Corporation
74AC175, 74ACT175 Rev. 1.4
FACT™ is a trademark of Fairchild Semiconductor Corporation.
74AC175, 74ACT175
Quad D-Type Flip-Flop
Features
I
I
I
I
I
I
I
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
Connection Diagram
74AC175SC
74AC175SJ
74AC175MTC
74AC175PC
74ACT175SC
74ACT175SJ
74ACT175MTC
I
Edge-triggered D-type inputs
Buffered positive edge-triggered clock
Asynchronous common reset
True and complement output
Outputs source/sink 24mA
ACT175 has TTL-compatible inputs
CC
Number
Order
reduced by 50%
Package
Number
MTC16
MTC16
M16A
M16D
M16A
M16D
N16E
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow
Body
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide
General Description
The AC/ACT175 is a high-speed quad D-type flip-flop.
The device is useful for general flip-flop requirements
where clock and clear inputs are common. The informa-
tion on the D-type inputs is stored during the LOW-to-
HIGH clock transition. Both true and complemented out-
puts of each flip-flop are provided. A Master Reset input
resets all flip-flops, independent of the Clock or D-type
inputs, when LOW.
Pin Descriptions
Package Description
MR
Q
Q
D
CP
Pin Names
0
0
0
–Q
–Q
–D
3
3
3
Data Inputs
Clock Pulse Input
Master Reset Input
True Outputs
Complement Outputs
Description
www.fairchildsemi.com
April 2007
tm

Related parts for 74AC175SC

74AC175SC Summary of contents

Page 1

... I Asynchronous common reset I True and complement output I Outputs source/sink 24mA I ACT175 has TTL-compatible inputs I Ordering Information Order Package Number Number 74AC175SC M16A 74AC175SJ M16D 74AC175MTC MTC16 74AC175PC N16E 74ACT175SC M16A 74ACT175SJ M16D 74ACT175MTC MTC16 Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. ...

Page 2

... IEEE/IEC Logic Diagram Please note that this diagram is provided only for the understanding of logic operations and should not be used to estimate propagation delays. ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1.4 Functional Description The AC/ACT175 consists of four edge-triggered D-type flip-flops with individual D inputs and Q and Q outputs. ...

Page 3

... O T Operating Temperature A ∆V / ∆t Minimum Input Edge Rate, AC Devices: V from 30 ∆V / ∆t Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1.4 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating –0.5V to +7.0V –20mA +20mA – ...

Page 4

... Notes: 1. All outputs loaded; thresholds on input associated with output under test. 2. Maximum test duration 2.0ms, one output loaded at a time and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1 +25° (V) Conditions Typ ...

Page 5

... Minimum Dynamic OLD (5) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1 +25° (V) Conditions Typ ...

Page 6

... Pulse Width, W HIGH or LOW t MR Pulse Width, LOW W t Recovery Time REC Note: 7. Voltage range 3.3 is 3.3V ± 0.3V. Voltage range 5.0 is 5.0V ± 0.5V. ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1 +25° 50pF L (6) V (V) Min. Typ. Max. CC 3.3 ...

Page 7

... MR Pulse Width, LOW W t Recovery Time rec Note: 9. Voltage Range 5.0 is 5.0V ± 0.5V. Capacitance Symbol Parameter C Input Capacitance IN C Power Dissipation Capacitance PD ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1 +25° 50pF L (8) V (V) Min. Typ. Max. CC 5.0 175 236 5 ...

Page 8

... Physical Dimensions Dimensions are in millimeters unless otherwise noted. Figure 2. 16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1.4 Package Number M16A 8 www.fairchildsemi.com ...

Page 9

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. Figure 3. 16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1.4 Package Number M16D 9 www.fairchildsemi.com ...

Page 10

... Physical Dimensions (Continued) Dimensions are in millimeters unless otherwise noted. 5.00±0.10 4.55 0.11 MTC16rev4 Figure 4. 16-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1.4 0.65 4.4±0.1 1.45 Package Number MTC16 10 5.90 4 ...

Page 11

... Physical Dimensions (Continued) Dimensions are in inches (millimeters) unless otherwise noted. Figure 5. 16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300” Wide ©1988 Fairchild Semiconductor Corporation 74AC175, 74ACT175 Rev. 1.4 Package Number N16E 11 www.fairchildsemi.com ...

Page 12

... TRADEMARKS The following are registered and unregistered trademarks Fairchild Semiconductor owns or is authorized to use and is not intended exhaustive list of all such trademarks. ® ACEx Across the board. Around the world.¥ ActiveArray¥ Bottomless¥ Build it Now¥ CoolFET¥ CROSSVOLT¥ ...

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