74AC541PC Fairchild Semiconductor, 74AC541PC Datasheet

IC BUFF/DVR TRI-ST 8BIT 20DIP

74AC541PC

Manufacturer Part Number
74AC541PC
Description
IC BUFF/DVR TRI-ST 8BIT 20DIP
Manufacturer
Fairchild Semiconductor
Series
74ACr
Datasheets

Specifications of 74AC541PC

Logic Type
Buffer/Line Driver, Non-Inverting
Number Of Elements
1
Number Of Bits Per Element
8
Current - Output High, Low
24mA, 24mA
Voltage - Supply
2 V ~ 6 V
Operating Temperature
-40°C ~ 85°C
Mounting Type
Through Hole
Package / Case
20-DIP (0.300", 7.62mm)
Logic Family
74AC
Number Of Channels Per Chip
Octal
Polarity
Non-Inverting
Supply Voltage (max)
6 V
Supply Voltage (min)
2 V
Maximum Operating Temperature
85 C
Mounting Style
Through Hole
High Level Output Current
- 24 mA
Input Bias Current (max)
4 uA
Low Level Output Current
24 mA
Minimum Operating Temperature
- 40 C
Number Of Lines (input / Output)
3
Output Type
3-State
Propagation Delay Time
8 ns @ 3.3 V or 6 ns @ 5 V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
74AC541

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
74AC541PC
Manufacturer:
SANYO
Quantity:
43
Part Number:
74AC541PC
Manufacturer:
Fairchild/ON Semiconductor
Quantity:
3 724
Part Number:
74AC541PC
Manufacturer:
ON Semiconductor
Quantity:
487
©1988 Fairchild Semiconductor Corporation
74AC541, 74ACT541 Rev. 1.5.0
74AC541, 74ACT541
Octal Buffer/Line Driver with 3-STATE Outputs
Features
Ordering Information
Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number.
74AC541SC
74AC541SJ
74AC541MTC
74AC541PC
74ACT541SC
74ACT541MTC
I
3-STATE outputs
Inputs and outputs opposite side of package, allowing
easier interface to microprocessors
Output source/sink 24mA
74AC541 is a non-inverting option of the 74AC540
74ACT541 has TTL-compatible inputs
Order Number
CC
All packages are lead free per JEDEC: J-STD-020B standard.
and I
OZ
reduced by 50%
Package
Number
MTC20
MTC20
M20B
M20D
M20B
N20A
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide
20-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-013, 0.300" Wide
20-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm
Wide
General Description
The 74AC541 and 74ACT541 are octal buffer/line
drivers designed to be employed as memory and
address drivers, clock drivers and bus oriented transmitter/
receivers.
These devices are similar in function to the 74AC244
and 74ACTC244 while providing flow-through architec-
ture (inputs on opposite side from outputs). This pinout
arrangement makes these devices especially useful as
an output port for microprocessors, allowing ease of
layout and greater PC board density.
Package Description
January 2008
www.fairchildsemi.com

Related parts for 74AC541PC

74AC541PC Summary of contents

Page 1

... Order Number Number 74AC541SC M20B 74AC541SJ M20D 74AC541MTC MTC20 74AC541PC N20A 74ACT541SC M20B 74ACT541MTC MTC20 Device also available in Tape and Reel. Specify by appending suffix letter “X” to the ordering number. All packages are lead free per JEDEC: J-STD-020B standard. ©1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev ...

Page 2

... Connection Diagram ©1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0 Logic Symbol IEEE/IEC Truth Table Inputs HIGH Voltage Level X Immaterial L LOW Voltage Level Z High Impedance 2 I Outputs www.fairchildsemi.com ...

Page 3

... I V Output Voltage O T Operating Temperature Minimum Input Edge Rate, AC Devices: V from 30 Minimum Input Edge Rate, ACT Devices: V from 0.8V to 2.0V ©1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5.0 Parameter Parameter , V @ 3.3V, 4.5V, 5. 4.5V, 5. Rating 0.5V to 7.0V 20mA 20mA 0. 0.5V ...

Page 4

... Notes: 1. All outputs loaded; thresholds on input associated with output under test and I @ 3.0V are guaranteed to be less than or equal to the respective limit @ 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5 (V) Conditions Typ. ...

Page 5

... OLD (5) Output Current I OHD I Maximum Quiescent CC Supply Current Notes: 4. All outputs loaded; thresholds on input associated with output under test. 5. Maximum test duration 2.0ms, one output loaded at a time. ©1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5 (V) Conditions Typ. CC 4.5 V 0.1V or 1.5 ...

Page 6

... Output Disable Time PHZ t PLZ Note: 7. Voltage range 5.0 is 5.0V 0.5V. Capacitance Symbol C Input Capacitance IN C Power Dissipation Capacitance for AC PD Power Dissipation Capacitance for ACT ©1988 Fairchild Semiconductor Corporation 74AC541, 74ACT541 Rev. 1.5 50pF L (6) V (V) Min. Typ. CC 3.3 2.0 5 ...

Page 7

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 8

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 9

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 10

... Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifi ...

Page 11

... TRADEMARKS The following includes registered and unregistered trademarks and service marks, owned by Fairchild Semiconductor and/or its global subsidiaries, and is not intended exhaustive list of all such trademarks. ® ACEx Build it Now™ CorePLUS™ CROSSVOLT™ CTL™ Current Transfer Logic™ ...

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