SA25F005 Saifun, SA25F005 Datasheet - Page 29

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SA25F005

Manufacturer Part Number
SA25F005
Description
512Kb Serial Flash
Manufacturer
Saifun
Datasheet

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Bulk Erase (BE)
The BE instruction sets all bits in the
memory array to 1. Before it can be
executed, two separate instructions must
be carried out. The device must first be
write enabled via the WREN instruction,
and then a BE sequence, which consists of
four bytes plus data, may be executed. The
address of the memory locations to be
written must be outside the protected
address field location selected by the Block
Write Protection level. During an internal
BE cycle, all commands are ignored except
the RDSR instruction.
A BE instruction requires the following
sequence:
1. After the CSb line is pulled low to
2. Erasing begins after the CSb pin is
select the device, the BE opcode is
transmitted via the SI line.
brought
low-to-high transition must occur
during
immediately after the clock in the
last opcode bit.
SCK
the
CS
high.
SI
SCK
The
Figure 22. Bulk Erase (BE) Instruction Sequence
low
CSb
time,
pin's
0
1
2
Instruction
3
As soon as CSb is driven high, the
self-timed BE cycle (whose duration is
defined as T
cycle is in progress, the status register may
be read to check the value of the /RDY bit.
The /RDY bit is 1 during the self-timed BE
cycle, and 0 when it is completed. The
WEN bit is reset at some unspecified time
before
instruction sequence is shown in Figure 22.
The SA25F005 is automatically returned to
the Write Disable state at the completion of
a BE cycle.
4
NOTES:
1. If the device is not write enabled,
2. A BE instruction can be applied
5
the
instruction
standby state when CSb is brought
high. A new CSb falling edge is
required to re-initiate the serial
communication.
only if both Block Protect (BP1,
BP0) bits (as described in Table 8,
page 18, and Table 9, page 21)
are 0.
the
6
device
BE
cycle
) is initiated. While the BE
7
SA25F005 Advanced Information
and
ignores
is
returns
completed.
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the
to
SAIFUN
the
BE
The
29

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