DSP56300 Motorola Inc, DSP56300 Datasheet - Page 7

• Manufacturer Part Number: DSP56300
• Description: DSP56301 Digital Signal Processor
• Manufacturer: Motorola Inc

Errata
Number
ED25
DSP56301 Errata
 1996-2002, Motorola
Document Update
Description (added 12/16/98):
Current definition:
HDTC is set if SRRQ and MRRQ are cleared (i.e. the host-to-DSP
data path is emptied by DSP56300 core reads) under one of the
following conditions:
•
•
•
New definition:
HDTC is set if SRRQ and MRRQ are cleared (i.e. the host-to-DSP
data path is emptied by DSP56300 Core reads) under one of the
following conditions:
•
•
Note: The HDTC bit is not set after a read transaction initiated by
the HI32 as a PCI master.
Workaround:
NTR
a non-exclusive PCI write transaction to the HTXR termi-
nates or completes
HLOCK is negated after the completion of an exclusive
write access to the HTXR
the HI32 initiates a read transaction. The HI32 disconnects
(retry or disconnect-C) forthcoming write accesses to the
HTXR as long as HDTC is set.
a non-exclusive PCI write transaction to the HTXR termi-
nates or completes
HLOCK is negated after the completion of an exclusive
write access to the HTXR. The HI32 disconnects (retry or
disconnect-C) forthcoming write accesses to the HTXR as
long as HDTC is set.
Freescale Semiconductor, Inc.
DSP56301 Digital Signal Processor
For More Information On This Product,
301CE2K30A_0_8
Go to: www.freescale.com
Mask:2K30A
Chip Errata
ng 12/19/02 pg. 7
Applies
to Mask
2K30A