IMP1232 IMP Inc, IMP1232 Datasheet - Page 5

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IMP1232

Manufacturer Part Number
IMP1232
Description
5V P Power Suppl er Supply Monit y Monitor and or and Reset Cir eset Circuit
Manufacturer
IMP Inc
Datasheet

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Watchdog Timer and ST Input
A watchdog timer stops and restarts a microprocessor that is
“hung-up”. Through the time delay input, TD, three watchdog
time-out periods are selectable: 150ms, 610ms and 1,200ms. If the
strobe input, ST, is not strobed LOW prior to timeout, reset signals
become active. On power-up or after the supply voltage returns to
an in-tolerance condition, the reset signal remains active for
250ms minimum, allowing the power supply and system micro-
processor to stabilize.
ST Pulses as short as 20ns can be detected.
©
RESET
1999 IMP, Inc.
ST
Note: ST is ignored whenever a reset is active.
Figure 5. Timing Diagram: Strobe Input
t
RST
Strobe
Valid
1
2
3
4
IMP1232LP/LPS
PBRST
TD
TOL
GND
(Min)
t
TD
t
ST
RESET
RESET
Strobe
Valid
V
ST
CC
Figure 6. Application Circuit: Watchdog Timer
8
7
6
5
(Max)
5V
t
TD
408-432-9100/www.impweb.com
Strobe
Invalid
1232_09.eps
10k
A HIGH-to-LOW ST signal transition must be regularly issued
no later than the minimum time-out period defined by the state of
the TD signal. This guarantees the watchdog timer does not
time-out.
Timeouts periods of approximately 150ms, 610ms or 1,200ms are
selected through the TD pin.
The watchdog timer cannot be disabled. It must be strobed with a
high-to-low transition to avoid a watchdog timeout.
G
F
V
o l
C
N
C
t a
D
RESET
n i
g
P
Address
MREQ
Bus
Application Information
IMP1
IMP1
6
2
5
2
5
0
5 .
0
0
Decoder
232LP/LPS
232LP/LPS
1
1
6
2
5
1
0
0
0
0
1232_07.eps
1
2
2
0
0
5
1
0
0
2
0
3
0
0
2
_
0 t
3
e .
p
s
5

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