UPSD3234AV-24U1T STMicroelectronics, UPSD3234AV-24U1T Datasheet - Page 110
UPSD3234AV-24U1T
Manufacturer Part Number
UPSD3234AV-24U1T
Description
Flash Programmable System Devices with 8032 Microcontroller Core and 64Kbit SRAM
Manufacturer
STMicroelectronics
Datasheet
1.UPSD3234AV-24U1T.pdf
(170 pages)
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uPSD3234A, uPSD3234BV, uPSD3233B, uPSD3233BV
Separate Space Mode. Program space is sepa-
rated from Data space. For example, Program Se-
lect Enable (PSEN) is used to access the program
code from the primary Flash memory, while READ
Strobe (RD) is used to access data from the sec-
ondary Flash memory, SRAM and I/O Port blocks.
This configuration requires the VM Register to be
set to 0Ch (see Figure 55).
Figure 55. Separate Space Mode
Figure 56. Combined Space Mode
110/170
RD
PSEN
VM REG BIT 3
VM REG BIT 4
VM REG BIT 1
VM REG BIT 2
VM REG BIT 0
DPLD
RD
RS0
CSBOOT0-3
FS0-FS7
PSEN
DPLD
RS0
CSBOOT0-3
FS0-FS7
CS
Memory
Primary
Flash
OE
Combined Space Modes. The
Data spaces are combined into one memory
space that allows the primary Flash memory, sec-
ondary Flash memory, and SRAM to be accessed
by either Program Select Enable (PSEN) or READ
Strobe (RD). For example, to configure the prima-
ry Flash memory in Combined space, Bits b2 and
b4 of the VM Register are set to '1' (see Figure 56).
CS
Primary
Memory
Flash
OE
Secondary
CS
Memory
Flash
OE
RD
Secondary
CS
Memory
Flash
OE
CS
SRAM
OE
Program
CS
SRAM
OE
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