LM3S316-IQN25 Luminary Micro, Inc., LM3S316-IQN25 Datasheet - Page 8

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LM3S316-IQN25

Manufacturer Part Number
LM3S316-IQN25
Description
Microcontroller
Manufacturer
Luminary Micro, Inc.
Datasheet

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Part Number
Manufacturer
Quantity
Price
Part Number:
LM3S316-IQN25-C2
Manufacturer:
Texas Instruments
Quantity:
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Manufacturer:
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Quantity:
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List of Figures
List of Figures
Figure 1-1.
Figure 1-2.
Figure 2-1.
Figure 2-2.
Figure 5-1.
Figure 5-2.
Figure 5-3.
Figure 5-4.
Figure 5-5.
Figure 6-1.
Figure 6-2.
Figure 7-1.
Figure 8-1.
Figure 8-2.
Figure 8-3.
Figure 8-4.
Figure 9-1.
Figure 9-2.
Figure 9-3.
Figure 9-4.
Figure 10-1.
Figure 11-1.
Figure 11-2.
Figure 12-1.
Figure 12-2.
Figure 13-1.
Figure 13-2.
Figure 13-3.
Figure 13-4.
Figure 13-5.
Figure 13-6.
Figure 13-7.
Figure 13-8.
Figure 13-9.
Figure 13-10. MICROWIRE Frame Format (Single Frame)........................................................................... 274
Figure 13-11. MICROWIRE Frame Format (Continuous Transfer) ............................................................... 275
Figure 13-12. MICROWIRE Frame Format, SSIFss Input Setup and Hold Requirements............................ 276
Figure 14-1.
Figure 14-2.
Figure 14-3.
Figure 14-4.
Figure 14-5.
Figure 14-6.
Figure 14-7.
Figure 14-8.
Figure 14-9.
8
Stellaris High-Level Block Diagram ........................................................................................... 27
LM3S316 Controller System-Level Block Diagram ................................................................... 33
CPU Block Diagram .................................................................................................................. 35
TPIU Block Diagram .................................................................................................................. 36
JTAG Module Block Diagram .................................................................................................... 43
Test Access Port State Machine ............................................................................................... 46
IDCODE Register Format.......................................................................................................... 50
BYPASS Register Format ......................................................................................................... 50
Boundary Scan Register Format ............................................................................................... 51
External Circuitry to Extend Reset............................................................................................. 53
Main Clock Tree ........................................................................................................................ 56
Flash Block Diagram ................................................................................................................. 94
GPIO Module Block Diagram .................................................................................................. 109
GPIO Port Block Diagram........................................................................................................ 110
GPIODATA Write Example...................................................................................................... 111
GPIODATA Read Example ..................................................................................................... 111
GPTM Module Block Diagram ................................................................................................. 147
16-Bit Input Edge Count Mode Example ................................................................................. 151
16-Bit Input Edge Time Mode Example................................................................................... 152
16-Bit PWM Mode Example .................................................................................................... 153
WDT Module Block Diagram ................................................................................................... 178
ADC Module Block Diagram.................................................................................................... 202
Internal Temperature Sensor Characteristic............................................................................ 204
UART Module Block Diagram.................................................................................................. 232
UART Character Frame........................................................................................................... 233
SSI Module Block Diagram...................................................................................................... 267
TI Synchronous Serial Frame Format (Single Transfer).......................................................... 269
TI Synchronous Serial Frame Format (Continuous Transfer) ................................................. 270
Freescale SPI Format (Single Transfer) with SPO=0 and SPH=0 .......................................... 271
Freescale SPI Format (Continuous Transfer) with SPO=0 and SPH=0 .................................. 271
Freescale SPI Frame Format with SPO=0 and SPH=1........................................................... 272
Freescale SPI Frame Format (Single Transfer) with SPO=1 and SPH=0............................... 272
Freescale SPI Frame Format (Continuous Transfer) with SPO=1 and SPH=0....................... 273
Freescale SPI Frame Format with SPO=1 and SPH=1........................................................... 273
I
I
Data Validity During Bit Transfer on the I
START and STOP Conditions ................................................................................................. 303
Complete Data Transfer with a 7-Bit Address ......................................................................... 304
R/S Bit in First Byte ................................................................................................................. 305
Master Single SEND................................................................................................................ 305
Master Single RECEIVE.......................................................................................................... 306
Master Burst SEND ................................................................................................................. 307
2
2
C Block Diagram ................................................................................................................... 302
C Bus Configuration.............................................................................................................. 303
Preliminary
2
C Bus..................................................................... 303
October 8, 2006

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