LM3S600 Bookham Technology, Inc., LM3S600 Datasheet - Page 102
![no-image](/images/no-image-200.jpg)
LM3S600
Manufacturer Part Number
LM3S600
Description
Microcontroller
Manufacturer
Bookham Technology, Inc.
Datasheet
1.LM3S600.pdf
(378 pages)
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System Control
Software Reset Control 2 (SRCR2)
Base 0x400F.E000
Offset 0x048
Type R/W, reset 0x00000000
102
Reset
Reset
Type
Type
Bit/Field
31:5
4
3
2
1
0
RO
RO
31
15
0
0
Register 30: Software Reset Control 2 (SRCR2), offset 0x048
Writes to this register are masked by the bits in the Device Capabilities 4 (DC4) register.
RO
RO
30
14
0
0
reserved
GPIOE
GPIOD
GPIOC
GPIOB
GPIOA
Name
RO
RO
29
13
0
0
RO
RO
28
12
0
0
RO
RO
Type
27
11
R/W
R/W
R/W
R/W
R/W
0
0
RO
reserved
RO
RO
26
10
0
0
Reset
0
0
0
0
0
0
RO
RO
25
0
9
0
Preliminary
Description
Software should not rely on the value of a reserved bit. To provide
compatibility with future products, the value of a reserved bit should be
preserved across a read-modify-write operation.
Port E Reset Control
Reset control for GPIO Port E.
Port D Reset Control
Reset control for GPIO Port D.
Port C Reset Control
Reset control for GPIO Port C.
Port B Reset Control
Reset control for GPIO Port B.
Port A Reset Control
Reset control for GPIO Port A.
RO
RO
24
0
8
0
reserved
RO
RO
23
0
7
0
RO
RO
22
0
6
0
RO
RO
21
0
5
0
GPIOE
R/W
RO
20
0
4
0
GPIOD
R/W
RO
19
0
3
0
GPIOC
R/W
RO
18
0
2
0
October 01, 2007
GPIOB
R/W
RO
17
0
1
0
GPIOA
R/W
RO
16
0
0
0
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