AN1177 STMicroelectronics, AN1177 Datasheet - Page 5

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AN1177

Manufacturer Part Number
AN1177
Description
P51XA-PSD8XX DESIGN GUIDE
Manufacturer
STMicroelectronics
Datasheet
Figure 4. Physical Connections, P51XA and PSD8XXFX
SIMPLE DESIGN EXAMPLE
The first design example outlines the steps required to get a P51XA system up and running quickly. A con-
nection diagram, memory map, and the necessary design file for the PSDsoft Express software develop-
ment environment are provided. A PSD813F2 was used for this example. However, other members of the
Flash PSD family may be used instead, with minor changes to the sample design file. See the selector
guide on the website for a comparison of the products.
Memory Map
For this simple design, we used a PSD813F2 with the following memories:
Note: the PSD memory segments are defined in the “Chip Select Equations” screen in PSDsoft Express.
We’ll use the boot memory to hold the ISP boot loader code, P51XA interrupt vectors, and common firm-
ware functions. For this example, we’ll execute from secondary Flash memory only and leave the main
Flash memory in Data Space. Let’s examine the sample memory map in Figure 5.
128 KBytes main Flash memory, broken into eight 16 KByte segments denoted fs
32 KBytes boot Flash memory, broken into four 8 KByte segments denoted csboot
PSD813F1 has an EEPROM instead of Flash memory. Therefore, ees
of csboot
2 KByte SRAM (rs0)
256 byte PSD813F configuration register (csiop).
j
.
Connections:
Philips P51XA MCU and
WSI Flash PSD8XXFX
PLCC Package.
Note: only the necessary
pins on the P51XA are
shown.
P51XA Assumptions:
* The logic levels on the EA\ and
* The Bus Configuration Register
* The Bus Timing Registers
BUSW pins are low at reset.
(BCR), bits BC2-BC0 are set to
010 to enable an 8-bit data
interface and a 20-bit address
output.
(BTRH/BTRL) are set up such
that there are no timing conflicts
between the PSD8XXFX and the
P51XA.
RESET\
Vcc
EA\
BUSW
P51XA
A0/WRH
A4/ D0
A5/D1
A6/D2
A7/D3
A8/D4
A9/D5
A10/D6
A11/D7
A12/D7
PSEN\
RST\
WR\
ALE
RD\
A1
A2
A3
A13
A14
A15
A16
A17
A18
A19
48
8
30
31
32
33
34
35
36
37
39
40
41
42
43
44
45
46
47
50
49
10
9
ADIO0
ADIO1
ADIO2
ADIO3
ADIO4
ADIO5
ADIO6
ADIO7
ADIO8
ADIO9
ADIO10
ADIO11
ADIO12
ADIO13
ADIO14
ADIO15
CNTL0
CNTL1
CNTL2
PD0-ALE
PD1-CLKIN
PD2-CSi\
RESET\
PSD8XXFX
PC2/VSTBY
PC3/TSTAT
PC4/TERR
PC0/TMS
PC6/TDO
PC1/TCK
PC5/TDI
PA0
PA1
PA2
PA3
PA4
PA5
PA6
PA7
PB0
PB1
PB2
PB3
PB4
PB5
PB6
PB7
PC7
AN1177 - APPLICATION NOTE
29
28
27
25
24
23
22
21
52
51
20
19
18
17
14
13
12
11
7
6
5
4
3
2
j (j = 1-4)
TMS
TCK
TSTAT
TERR|
TDI
TDO
would be used in place
Optional 3.6 V
lithium battery or cap
i (i = 1-8)
JTAG port
Optional
j (j = 1-4)
AI03329B
. The
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