AN1231 Motorola / Freescale Semiconductor, AN1231 Datasheet - Page 10

no-image

AN1231

Manufacturer Part Number
AN1231
Description
Plastic Ball Grid Array (PBGA)
Manufacturer
Motorola / Freescale Semiconductor
Datasheet
AN1231
10
DEVICE REBUMPING TEST AND POSSIBLE
REUSE AFTER REMOVAL
subject of rebumping and reusing BGAs which have been re-
moved from an assembly for a variety of reasons. After a
BGA is de–soldered or removed from a motherboard with
heat, the resulting solder balls are typically non–uniform at
best and in some cases the pad is completely void of solder.
Methods, supplies, and a variety of equipment currently exist
to successfully remove the remaining solder residue from the
pads and replace the solder with new preform spheres to
make the device suitable for reuse. Motorola does, in fact, re-
bump packages that are returned from the field to allow them
to be tested. However, Motorola does not recommend this
process be used to allow re–assembly of the BGA into actual
product. BGAs that are shipped by Motorola are typically
qualified to withstand from two to four reflows depending on
the intended application and the specific Motorola product
group involved. That is to say, the packaged devices are sub-
jected to from two to four reflows of preconditioning prior to
any reliability stressing as part of qualification testing. When
a BGA is removed from a board, rebumped, and reflowed
back onto a board it has potentially seen from a minimum of
four up to six reflows and may have exceeded the number for
which it was qualified. Additionally, there is no traceability to
discern a BGA that has been rebumped versus one that has
not. Any questions in this area should be directed to the reli-
ability and quality assurance group dealing with the particular
BGA in question.
compared to conventional leads has raised concern about its
suitability for certain applications where environments are
severe (i.e., automotive), required lifetime is long (i.e., tele-
communications) or device power is substantial (i.e., micro-
processors). This lead compliance is important when a
mounted PBGA is subjected to any thermal excursions since
the joint typically absorbs the relative device/board expan-
sion and contraction caused by thermal mismatch or temper-
ature gradients. The materials that are used to construct the
PBGA, as outlined in the earlier section on package
construction, have thermal expansion coefficients that for the
most part match that of the FR4/glass PCB to which they are
typically mounted. The largest exception to this, for materials
which are structurally significant to the package, is the silicon
die. It has an expansion coefficient of 2.6 ppm/ C compared
to 15 to 17 ppm/ C for other structural materials (see
Table 2).
THERMAL CYCLING METHODOLOGY
used to compare the performance of PBGAs relative to con-
ventional leaded as well as other technologies. It is also used
to detect any latent process defects that may be manifested
in the first few cycles and to determine a wear-out (i.e.,
fatigue) failure distribution for the given device and environ-
ment. These test conditions are typically accelerated in cycle
time as well as temperature extremes when compared to the
actual application use environment. This is necessary since,
by definition, an accelerated test is meant to decrease time
Much discussion has taken place within the industry on the
The decreased compliance of PBGA solder joints as
Assembly-level accelerated thermal cycling is generally
SOLDER JOINT RELIABILITY
to failure so that the failure characteristics and mechanisms
may be known before the prohibitive amount of time it would
take for something to fail in an actual application. Temper-
ature extremes chosen could be the worst case expected
application conditions or an expansion of that excursion to
further accelerate the test. In either situation, the test will be
accelerated because the cycle times chosen will probably be
less than the application cycle time. A field cycle length
depends on the particular application. For example, desk-
tops personal computers are usually considered to cycle one
or two times per day, while laptops cycle three to five or more
cycles per day. A network server or high-end workstation
may only cycle once every month on average to basically
never.
smaller than the ultimate population in the field. Therefore,
accelerated reliability test results must be statistically ana-
lyzed and extrapolated to determine application cycles to fail
a small percentage of the population. Also, these differences
between cycle duration, form of excitation (i.e., internal
device power versus ambient temperature swings) and tem-
perature extremes between the accelerated test and the
application field environment may need to be resolved before
accurate predictions of field solder joint reliability can be
made. These three differences result in a different failure dis-
tribution, namely the scale (time to 50% device failure) of that
distribution, determined from accelerated testing than would
be obtained by cycling to the actual application conditions.
Everything involved with accounting for and resolving those
differences is beyond the scope of this document, but some
basic discussion to that end is included.
TESTING CONFIGURATION
standard production processes to test boards that approxi-
mate the actual application board configuration in thickness,
number of layers and pad geometry/layout. Some way of
determining when a PBGA has failed must be used in order
to gather failure data. The standard way is to use daisy-chain
devices where adjacent pads are simply shorted on the
PBGA substrate. Motorola has daisy-chain versions of all the
PBGA designs that are currently available expressly for this
purpose as well as for process studies. Traces directly con-
necting adjacent pads on the test board complete the chain
such that there are one or more independent nets that go
through all joints. An entire device can be covered with one
net or several nets can be used to determine, for example,
how rows fail relative to one another. Figure 10 provides an
example of a routing scheme that was used on the 361 pin
PBGA with 1.27 mm pitch and a 25 mm body. The rows on
the device were divided into four sets: outer, middle, die
perimeter, and inner.
in-situ or every few (50 to 100 recommended) cycles to
determine if it has failed. Monitoring in-situ is the preferred
method and specialized equipment can be used to automate
or simplify the monitoring process. Event detectors made by
Anatech are especially made for monitoring solder joints,
logging the data to a computer file and calculating the sta-
tistical failure parameters (discussed later) in real time. Data
loggers with resistance capability may also be used.
The sample size in thermal cycling is generally much
Thermal cycling involves assembling PBGA devices using
The continuity of each net or device is measured either
MOTOROLA FAST SRAM

Related parts for AN1231