M201P1-L03 CHI MEI, M201P1-L03 Datasheet - Page 15

• Manufacturer Part Number: M201P1-L03
• Description: LCD Module
• Manufacturer: CHI MEI

6. INTERFACE TIMING
6.1 INPUT SIGNAL TIMING SPECIFICATIONS
The input signal timing specifications are shown as the following table and timing diagram.
Note:
LVDS Clock
LVDS Data
Vertical Active Display Term
Horizontal Active Display Term
DCLK
DATA
DE
DE
Because this module is operated by DE only mode, Hsync and Vsync input signals should be set
to low logic level or ground. Otherwise, this module would operate abnormally.
Signal
T
C
Frequency
Period
High Time
Low Time
Setup Time
Hold Time
Frame Rate
Total
Display
Blank
Total
Display
Blank
INPUT SIGNAL TIMING DIAGRAM
T
T
Vd
hb
Item
Symbol
15 / 26
Tlvh
Tlvs
T
Tvd
Tvb
Thd
Thb
Tch
Tcl
Th
Fc
Tv
Tc
Fr
v
Th-Thd
Tv-Tvd
T
1051
1050
Min.
14.8
600
600
740
700
h
56
-
-
-
T
hd
1066
1050
18.5
Typ.
844
700
144
4/7
3/7
54
60
42
-
-
T
Vb
Th-Thd
Tv-Tvd
Max.
1300
1050
67.5
980
700
75
-
-
-
-
-
Issued Date: Aug. 30, 2006
Model No.: M201P1-L03
DOC No.:
MHz
Unit
Hz
Th
Th
Th
ns
ps
ps
Tc
Tc
Tc
Tc
Tc
Th=Thd+Thb
Tv=Tvd+Tvb
Approval
Version 2.0
Note
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