DS2704 Maxim Integrated Products, DS2704 Datasheet
DS2704
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DS2704 Summary of contents
Page 1
... GENERAL DESCRIPTION The DS2704 provides 1280 bits of EEPROM data storage and a Secure Hash Algorithm (SHA) engine. The Dallas 1-WireÒ interface communication on a single battery contact and the 64-bit unique serial number networking and identification of individual devices. The 1280-bit memory is organized as 5 pages of 32 ...
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ABSOLUTE MAXIMUM RATINGS Voltage Range on All Pins, Relative to V Operating Temperature Range Storage Temperature Range Soldering Temperature Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and ...
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AC ELECTRICAL CHARACTERISTICS: 1-WIRE INTERFACE (2.5V £ V £ 5.5V -30°C to +85°C PARAMETER STANDARD BUS TIMING Time Slot Recovery Time Write 0 Low Time Write 1 Low Time Read Data Valid Reset Time High Reset ...
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... VSS DETAILED DESCRIPTION The DS2704 is comprised of an EEPROM memory array and SHA-1 Authentication function that are accessed via a 1-Wire interface. The 1-Wire interface controls access by a host system to the 64-bit Net Address (ROM ID), SHA-1 Authentication, 1280-bit EEPROM memory and EEPROM Status. ...
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... EEPROM technology versus the EPROM technology used for the DS2502, writing of the Memory and Status data fields is not the same as the DS2502. The DS2704 includes an on-chip charge pump to facilitate in- circuit programming. The need to apply an external high voltage programming pulse during pack manufacture is therefore eliminated ...
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... CLEAR SECRET [5Ah]. This command sets the 64-bit secret to all 0’s (0000 0000 0000 0000h). The host must wait t for the DS2704 to write the new secret value to EEPROM. See Figure 10 on page 18 for command timing. EEC COMPUTE NEXT SECRET WITHOUT ROM ID [30h]. This command initiates a SHA-1 computation of the MAC and uses a portion of the resulting MAC as the next or new secret. The MAC computation is performed with the current 64-bit secret and the 64-bit challenge. Logical 1’ ...
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... If reading continues through the end of PAGE 3, the bus master can issue eight additional read time slots and the DS2704 will respond with a 8-bit CRC of all data bytes read from the initial starting byte through the last byte of PAGE 3. Terminating the command transaction with a reset pulse prior to reaching the end of PAGE 3 results in a loss of availability of the 8-bit CRC ...
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... The valid range for the address is 00h – 07h. The address is auto-incremented after each data byte is read. When the address is greater than 07h, any further reads will return bit values of 1. The DS2704 returns bits from the scratchpad beginning with the least significant bit of the least significant byte. ...
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... TA2=(T15:T8)) that indicates a starting byte location within the data field. An 8-bit CRC of the command byte and address bytes is computed by the DS2704 and read back by the bus master to confirm that the correct command word and starting address were received. If the CRC is deemed to be incorrect by the bus master, a reset pulse should be issued and the entire sequence repeated ...
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... The 1-Wire bus is a system that has a single bus master and one or more slaves. A multidrop bus is a 1-Wire bus with multiple slaves, while a single-drop bus has only one slave device. In all instances, the DS2704 is a slave device. The bus master is typically a microprocessor in the host system. The discussion of this bus system consists of five topics: 64-bit net address, CRC generation, hardware configuration, transaction sequence, and 1-Wire signaling ...
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... CRC GENERATION The DS2704 has an 8-bit CRC stored in the most significant byte of its 1-Wire net address and generates a CRC during some command protocols. To ensure error-free transmission of the address, the host system can compute a CRC value from the first 56 bits of the address and compare it to the CRC from the DS2704. ...
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... This command can be used with one or more slave devices on the bus. Skip Net Address [CCh]. This command saves time when there is only one DS2704 on the bus by allowing the bus master to issue a function command without specifying the address of the slave. If more than one slave device is present on the bus, a subsequent function command can cause a data collision when all slaves transmit data at the same time ...
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... A read-time slot is initiated when the bus master pulls the 1-Wire bus line from a logic-high level to a logic-low level. The bus master must keep the bus line low for at least 1ms and then release it to allow the DS2704 to present valid data. The bus master can then sample the data t time slot, the DS2704 releases the bus line and allows pulled high by the external pullup resistor ...
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... GND Master Sample Window MODE Standard 15ms Overdrive 2ms LINE TYPE LEGEND: Bus Master active LOW Both Bus Master and Device active LOW DS2704: 1280-Bit EEPROM with SHA-1 Authentication WRITE 1 SLOT t REC >1ms MAX MIN TYP 30ms 15ms 3ms 2ms READ DATA SLOT ...
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... Write Status Write Scratchpad Read Scratchpad Copy Scratchpad Set Overdrive Clear Overdrive Reset Key: CC¾complete compatibility, NP:¾no programming pulse required on DS2704. HEX FUNCTION Writes 64-bit challenge for SHA-1 0C processing. Required prior to all Compute MAC and Compute Next Secret commands. Computes hash of the message block with all 36 1’ ...
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... TA1, TA2 Reset Figure 7: Compute MAC Function Command 1-Wire SKIP ROM Reset Cmd Presence Compute Pulse MAC Cmd DS2704: 1280-Bit EEPROM with SHA-1 Authentication ISSUE 00H READ/WRITE BEFORE TIME SLOTS READ Write: 64 Yes Read 160 Read 1024 (data (CRC) ...
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... Presence Cmd Pulse Figure 9: Copy Scratchpad Function Command 1-Wire SKIP ROM Copy Reset Cmd Scratchpad Cmd Presence Pulse DS2704: 1280-Bit EEPROM with SHA-1 Authentication t SHA Wait for MAC Computation EEPROM Programming 16 Write EEPROM Programming Time Slots (TA1, TA2 EEC ...
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Figure 10: Clear/Lock Secret, Set/Clear Overdrive Function Commands 1-Wire SKIP ROM Reset Cmd Presence Pulse PACKAGE INFORMATION (For the latest package outline information www.maxim-ic.com/DallasPackInfo.) Clear/Lock Secret Cmd Wait for EEPROM Copy Time or Set/Clear Overdrive Cmd 18 of ...