A1280A Actel, A1280A Datasheet - Page 21

• Manufacturer Part Number: A1280A
• Description: (A1225A - A1280A) FPGAs
• Manufacturer: Actel

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A C T
Pi n D es c r i pt i on
CLKA
TTL Clock input for clock distribution networks. The Clock
input is buffered prior to clocking the logic modules. This
pin can also be used as an I/O.
CLKB
TTL Clock input for clock distribution networks. The Clock
input is buffered prior to clocking the logic modules. This
pin can also be used as an I/O.
DCLK
TTL Clock input for diagnostic probe and device
programming. DCLK is active when the MODE pin is HIGH.
This pin functions as an I/O when the MODE pin is LOW.
GND
LOW supply voltage.
I/O
The I/O pin functions as an input, output, three-state, or
bidirectional buffer. Input and output levels are compatible
with standard TTL and CMOS specifications. Unused I/O
pins are automatically driven LOW by the ALS software.
MODE
The MODE pin controls the use of multifunction pins
(DCLK, PRA, PRB, SDI). When the MODE pin is HIGH, the
special functions are active. When the MODE pin is LOW,
the pins function as I/Os. To provide Actionprobe capability,
the MODE pin should be terminated to GND through a 10K
resistor so that the MODE pin can be pulled high when
required.
NC
This pin is not connected to circuitry within the device.
™
2 F a m il y F PG A s
Clock A (Input)
Clock B (Input)
Diagnostic Clock (Input)
Ground
Input/Output (Input, Output)
Mode (Input)
No Connection
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PRA
The Probe A pin is used to output data from any
user-defined design node within the device. This
independent diagnostic pin is used in conjunction with the
Probe B pin to allow real-time diagnostic output of any
signal path within the device. The Probe A pin can be used
as a user-defined I/O when debugging has been completed.
The pin’s probe capabilities can be permanently disabled to
protect programmed design confidentiality. PRA is active
when the MODE pin is HIGH. This pin functions as an I/O
when the MODE pin is LOW.
PRB
The Probe B pin is used to output data from any
user-defined design node within the device. This
independent diagnostic pin is used in conjunction with the
Probe A pin to allow real-time diagnostic output of any
signal path within the device. The Probe B pin can be used
as a user-defined I/O when debugging has been completed.
The pin’s probe capabilities can be permanently disabled to
protect programmed design confidentiality. PRB is active
when the MODE pin is HIGH. This pin functions as an I/O
when the MODE pin is LOW.
SDI
Serial data input for diagnostic probe and device
programming. SDI is active when the MODE pin is HIGH.
This pin functions as an I/O when the MODE pin is LOW.
V
HIGH supply voltage.
CC
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Probe A (Output)
Probe B (Output)
Serial Data Input (Input)
5.0V Supply Voltage
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