CY2071A Cypress Semiconductor, CY2071A Datasheet

Page 1

... MHz–30 MHz (reference clock) CY2071AF 3 10 MHz–25 MHz (external crystal) 1 MHz–30 MHz (reference clock) CY2071AFI 3 10 MHz–25 MHz (external crystal) 1 MHz–30 MHz (reference clock) Logic Block Diagram for CY2071A XTALIN REFERENCE OSCILLATOR XTALOUT Pin Configuration CLKA GND ...

Page 2

... Alternatively, an external reference clock of frequency be- tween 1 MHz and 30 MHz can be used. The CY2071A has one PLL and outputs three factory-EPROM configurable clocks: CLKA, CLKB, and CLKC. The output clocks can originate either from the PLL or the reference, or selected dividers thereof ...

Page 3

... Except Crystal Pins [6] Except Crystal Pins – 0. 0.5V IN Three State Outputs max. 3.3V operation *( ))). C is specified in pF and F is specified in MHz. LOAD CLKA CLKB CLKC LOAD CY2071A Min. Max. 4.5 5.5 3.0 3 – 10.0 25.0 1.0 30.0 0. +70 C Min. Typ. Max. 2.4 0.4 2.0 0.8 ...

Page 4

... MHz) OUT > 50 MHz) OUT [10, 11] for outputs MHz OUT [11] for outputs > 60 MHz OUT CY2071A = –40°C to +85°C Min. Typ. Max. 2.4 2.0 150 250 = –40°C to +85°C Min. Typ. Max. 2.4 2.0 150 250 15 pF ...

Page 5

... MHz OUT f 50 MHz) OUT > 50 MHz) OUT [10, 11] for outputs MHz OUT [11] for outputs MHz OUT CY2071A Min. Typ. Max. 10 2000 [100 MHz] [500 kHz] 12.50 2000 [80 MHz] [500 kHz] 0.8 1 350 500 250 350 45% 50% 55% 40% 50% 60% 1 ...

Page 6

... MHz) OUT > 50 MHz) OUT [10, 11] for outputs MHz OUT [11] for outputs MHz OUT 2.4V 0. CY2071A Min. Typ. Max. 12.50 2000 [80 MHz] [500 kHz] 15.0 2000 [66.6 MHz] [500 kHz] 0.8 1 350 500 250 350 45% 50% 55% 40% 50% 60% 1.5 2.5 1.5 2.5 0.5 ...

Page 7

... Ordering Information Ordering Code Package Name CY2071ASC-XXX S8 CY2071ASL-XXX S8 CY2071ASI-XXX S8 CY2071AF S8 CY2071AFI S8 CY3670 Package Characteristics Package (C/ Pin SOIC 170 Package Diagram Document #: 38-07139 Rev. *A © Cypress Semiconductor Corporation, 2001. The information contained herein is subject to change without notice. Cypress Semiconductor Corporation assumes no responsibility for the use of any circuitry other than circuitry embodied in a Cypress Semiconductor product ...

Page 8

... Document Title: CY2071A Single-PLL General-Purpose EPROM Programmable Clock Generator Document Number: 38-07139 Issue REV. ECN NO. Date ** 110248 12/17/01 *A 121827 12/14/02 Document #: 38-07139 Rev. *A Orig. of Change Description of Change SZV Change from Spec number: 38-00521 to 38-07139 RBI Power up requirements added to Operating Conditions Information CY2071A Page ...