CY24119 Cypress Semiconductor, CY24119 Datasheet
CY24119
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CY24119 Summary of contents
Page 1
... Output Frequencies One copy of 27-MHz (3.3V) positive slope VCXO curve One copy of 27-MHz (3.3V) negative slope VCXO curve Pin Configuration CY24119,-1 8-pin SOIC 1 XIN 2 AVDD VCXO 3 AVSS 4 , • San Jose CA 95134 • Revised October 8, 2003 CY24119 XOUT 8 7 VSS 6 27 MHz 5 VDD 408-943-2600 ...
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... Min. 3. 0.05 Description – 0. 3.3V (source 0. 3.3V (sink Sum of Core and Output Current Description Condition Parallel resonance, funda- mental mode, AT cut Fundamental mode CY24119 Description CXO Max. 7.0 125 125 Typ. Max. 3.3 3. 500 Min. Typ. Max – ...
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... DD 0.1 µF OUTPUTS DD 0.1 µF GND Test Circuit Package Name Package Type S8 8-pin SOIC S8 8-pin SOIC – Tape and Reel S8 8-pin SOIC S8 8-pin SOIC – Tape and Reel CY24119 Condition Min. Typ. Max. 3 0.5 2.0 300 –150 180 250 14.4 18 21.6 Min. Typ. Max ...
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... SEATING PLANE 0.061[1.549] 0.068[1.727] 0.004[0.102] 0.004[0.102] 0°~8° 0.0098[0.249] 0.0138[0.350] 0.0192[0.487] CY24119 MAX. ROUND ON SINGLE LEADFRAME RECTANGULAR ON MATRIX LEADFRAME PART # S08.15 STANDARD PKG. SZ08.15 LEAD FREE PKG. 0.010[0.254] X 45° 0.016[0.406] 0.0075[0.190] ...
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... Document History Page Document Title: CY24119 MediaClock™ 27-MHz VCXO Clock Generator Document Number: 38-07200 REV. ECN NO. Issue Date ** 111551 *A 121877 *B 129724 Document #: 38-07200 Rev DataSheet U .com PRELIMINARY Orig. of Change 03/22/02 CKN New Data Sheet 12/14/02 RBI Power-up requirements added to Operating Conditions Information ...