CY28405 Cypress Semiconductor, CY28405 Datasheet - Page 9

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CY28405

Manufacturer Part Number
CY28405
Description
CK409-Compliant Clock Synthesizer
Manufacturer
Cypress Semiconductor
Datasheet

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Document #: 38-07512 Rev. *B
Byte 11: Control Register 11
Byte 12: Control Register 12
Byte 13: Control Register 13
Byte 14: Control Register 14
Bit
Bit
Bit
Bit
1
1
1
7
6
5
4
3
2
0
7
6
5
4
3
2
0
7
6
5
4
3
2
0
7
6
5
@Pup
@Pup
@Pup
@Pup
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
Reserved
Recovery_Frequency
Watchdog Time Stamp
Reload
WD_Alarm
WD_TIMER3
WD_TIMER2
WD_TIMER1
WD_TIMER0
CPU_FSEL_N0
CPU_FSEL_M6
CPU_FSEL_M5
CPU_FSEL_M4
CPU_FSEL_M3
CPU_FSEL_M2
CPU_FSEL_M1
CPU_FSEL_M0
FS_(E:A)
Reserved
Reserved
CPU_FSEL_N8
CPU_FSEL_N7
CPU_FSEL_N6
CPU_FSEL_N5
CPU_FSEL_N4
CPU_FSEL_N3
CPU_FSEL_N2
CPU_FSEL_N1
Name
Name
Name
Name
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[8:0] and
CPU_FSEL_M[6:0] will be used to determine the CPU output frequency.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[E:A] register will be used. When it is set, the frequency
ratio stated in the SEL[4:0] register will be used.
Vendor Test Mode (always program to 0)
This bit allows selection of the frequency setting that the clock will be
restored to once the system is rebooted
To enable this function the register bit must first be set to “0” before toggling
to “1”.
This bit is set to “1” when the Watchdog times out. It is reset to “0” when
the system clears the WD_TIMER time stamp
Watchdog timer time stamp selection:
If Prog_Freq_EN is set, the values programmed in CPU_FSEL_N[8:0] and
CPU_FSEL_M[6:0] will be used to determine the CPU output frequency.
The setting of FS_Override bit determines the frequency ratio for CPU and
other output clocks. When it is cleared, the same frequency ratio stated in
the Latched FS[E:A] register will be used. When it is set, the frequency
ratio stated in the SEL[4:0] register will be used.
FS_Override
0 = Select operating frequency by FS(E:A) input pins
1 = Select operating frequency by FSEL(4:0) settings
Reserved, Set = 1
Reserved, Set = 0
0: Use Hardware settings
1: Use Last SW table Programmed values
0: Do not reload
1: Reset timer but continue to count.
0000: Off
0001: 2 second
0010: 4 seconds
0011: 6 seconds
.
.
.
1110: 28seconds
1111: 30seconds
Description
Description
Description
Description
CY28405
Page 9 of 19

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