AN2323 Freescale Semiconductor / Motorola, AN2323 Datasheet - Page 6

• Manufacturer Part Number: AN2323
• Description: PowerPC MPC7455 I/O Power Evaluation
• Manufacturer: Freescale Semiconductor / Motorola

Estimating Max I/O Power
Estimating Max I/O Power
The routine loads two 32k blocks of memory with alternating lines of 5s and As. Then, in the main loop, it
continuously bursts data into the cache, alternating between memory blocks. The size of the memory block
was chosen to be exactly twice the size of the cache to prevent any data from being pulled from cache rather
than memory, and the location of the memory blocks was chosen such that as much variance in address
signals could be achieved.
While running this routine on the MPC7455 the measured I/O power was 458.75 mW. This was run with a
100 MHz bus and the data signals were found to switch at an average frequency of 24 MHz.
4.2
It is possible that with a different system configuration, the frequency of data, address and control signal
switching could increase slightly. Assuming a 100 MHz bus frequency it is possible to estimate a maximum
(although not attainable) value for I/O power.
Assuming power can be calculated according to the equation below:
where P
described in Part I, n and f are calculated while running varying routines, P is measured using the process
shown in Part II and, of course, voltage swing (V) is constant. With this in mind, by running two routines,
values for P
values can be checked.
This procedure was used with the JPEG compression benchmark, the maximum I/O power routine from
section 4.1 and a third routine written to generate a power dissipation value in between these two values.
The following results for P
These values can now be used to calculate a theoretical (but not attainable) maximum I/O power. When
running a 100 MHz bus frequency where signals are triggered on the rising or trailing edge of the bus clock,
the fastest frequency a signal could possibly transition is 50 MHz. Assuming all 108 I/O signals are active
and transitioned at 50 MHz (which is not attainable), using EQ 2 above, theoretical maximum I/O power is
only 1.15 W.
6
o
is constant for a given bus frequency and both P
Estimating Max I/O Power
o
and C can be attained (two equations, two unknowns) and by running a third routine these
o
Freescale Semiconductor, Inc.
and C were attained and checked:
P = n * C * V
PowerPC™ MPC7455 I/O Power Evaluation
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Figure 4-6. Max Power Simulation
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P
C = 29.7 pF
o
= 0.147 W
2
* f + P
o
o
and C are unknowns. By using the process
(EQ 2)
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