CY2PP3210 Cypress Semiconductor, CY2PP3210 Datasheet - Page 2

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CY2PP3210

Manufacturer Part Number
CY2PP3210
Description
Dual 1:5 Differential Clock / Data Fanout Buffer
Manufacturer
Cypress Semiconductor
Datasheet
Document #: 38-07508 Rev.*C
Pin Definitions
Governing Agencies
The following agencies provide specifications that apply to the
CY2PP3210. The agency name and relevant specification is
listed below in Table 2.
Table 1.
2
3
4
5
6
7
8
1,9,16,25,32
31,29,27,24,22
30,28,26,23,21
20,18,15,13,11
19,17,14,12,10
JEDEC
Mil-Spec
Notes:
1. In the I/O column, the following notation is used: I for Input, O for Output, PD for Pull-Down, PU for Pull-Up, and PWR for Power
2. In ECL mode (negative power supply mode), V
3. V
V
and are between V
EE
BB
Agency Name
is available for use for single-ended bias mode for |3.3V| supplies (not |2.5V|).
is connected to GND (0V) and V
Pin
CC
[1, 2, 3]
and V
EE
JESD 020B (MSL)
JESD 51 (Theta JA)
JESD 8–2 (ECL)
JESD 65–B (skew,jitter)
883E Method 1012.1 (Thermal Theta JC)
.
QA#(0:4)
QB#(0:4)
QA(0:4)
QB(0:4)
CLKA#
CLKB#
CLKA,
VBB
CLKB,
VEE
Name
VCC
NC
CC
[3]
[2]
is either +3.3V or +2.5V. In both modes, the input and output levels are referenced to the most positive supply (V
I,PD/PU ECL/PECL
I,PD/PU ECL/PECL
–PWR
+PWR
EE
I/O
I,PD
I,PD
Specification
O
O
O
O
O
is either –3.3V or –2.5V and V
[1]
ECL/PECL
ECL/PECL
ECL/PECL True output
ECL/PECL Complement output
ECL/PECL True output
ECL/PECL Complement output
Power
Power
Type
Bias
No connect.
Reference Voltage Output.
Negative Supply.
Positive Supply.
ECL/PECL Differential Input Clocks.
ECL/PECL Differential Input Clocks.
ECL/PECL Differential Input Clocks.
ECL/PECL Differential Input Clocks.
CC
is connected to GND (0V). In PECL mode (positive power supply mode),
Description
FastEdge™ Series
CY2PP3210
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