AN2417 Freescale Semiconductor / Motorola, AN2417 Datasheet - Page 10

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AN2417

Manufacturer Part Number
AN2417
Description
PCMCIA and Compact Flash Interface for the MC9328MX1 and MC9328MXL Application Processors Application Note
Manufacturer
Freescale Semiconductor / Motorola
Datasheet
Compact Flash Timing Characteristics
2.3 Glue Logic Block Diagram for Setup and Hold Time
10
Timing
Item
1
2
3
4
5
6
7
CE#
Address Setup
Address Hold
Delay 1 should be long enough to ensure enough holdtime for CE signal. (Refer to
timing diagram below) Large propagation delay logic gate (HC series) is used to
implemented the delay. The required delay can also implement using flipflop, with
EIM burst clock as clock input to flipflop. The EIM burst clock can be configured
as a standalone clock source by EIM configuration register.
following WE
following WE
IOWR Width
Data Setup
before WE
before WE
Data Hold
CE Setup
CE Hold
Time
Time
Time
Item
Address
WE#
Freescale Semiconductor, Inc.
tw(IOWR)
tdis(WE)
Symbol
tsu(CE)
tv(WT)
th(CE)
tsu(A)
For More Information On This Product,
th(A)
WAIT#
MC9328MX1/MXL Application Note
max 35ns
1
Engineering Draft / Preliminary
Go to: www.freescale.com
2
Memory Mode
Requirement
min 70ns
min 30ns
min 20ns
min 20ns
min 80ns
min 30ns
min 0ns
min 5ns
min 165ns
Figure 3.
Table 8.
NOTE:
Requirement
5
min 165ns
min 20ns
min 80ns
I/O Mode
min 70ns
min 20ns
min 60ns
min 30ns
min 5ns
min 5ns
6
4
min 70ns
achieve by glue logic
min 20ns
timing match by CS5
min 5ns
achieve by glue logic
min 20ns
achieve by glue logic
min 165ns
signal width programmable by WSC
bit in CS5 register/ determined by
wait signal
min 80ns
timing match by CS5
min 30ns
buffer used to ensure enough hold
time
2
7
Reference Design Timing
min 30ns
Requirement / Comment
min 20ns
MOTOROLA

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