I2C-Interface Philips Semiconductors / NXP Semiconductors, I2C-Interface Datasheet - Page 7

• Manufacturer Part Number: I2C-Interface
• Description: Programming the 12C Interface
• Manufacturer: Philips Semiconductors / NXP Semiconductors

Philips Semiconductors
one of our company’s smgle-board com-
support I’C. Instead, we’ve implement-
cause if either A or B goes low, so does
which, admittedly, is not blazingly fast.
The speed limit stems from the meager
ability of a pullup resistor to source cur-
pherals. The lo-microsecond period al-
parasitic capacitance of the wires. (The
maximum spectfied wtre capacttance ts
400 pF.1
PUITING
transactions to keep the example code
simple. The master. as you might imag-
me, IS defined as the unit that initiates
the data transfer and generates the
SCL srgnal. (In a multimaster system,
each master would be responstble for
generating its own SCL signal.) In our
exampIe. based strongly on the destgn of
puters, the processor doesn’t directly
open collector outputs can be connected
cause tt IS impossible to pull more cur-
output will produce. Tying outputs to-
gether will produce disastrous results if
dard TTL outputs. If some of the out-
state. Tying open-collector outputs to-
gether is also known as “wtre ORmg” be-
the single-output line.
maximum SCL rate of 1OOkHz SCL,
rent to a long distributed line of pert-
lows plenty of time to charge the
A
CMOS. so &open dram” is more appro-
output stage can only pull the node to
ground. A passive resistor pulls the node
high, which means that any number of
together with no deiiterious results. be-
rent through the reststor than any one
the same procedure is tried with stan-
puts go high and some are low. the cur-
rent IS unlimited and the logic level of
the output ~111 be in an indetermmate
pullup reststor is external.
priate) contiguratron means that the
l*C Specific information
The PC bus speed is specified at a
Open-collector
Ithough FC supports multi-
ple-master operation, here we
use single-master, single-slave
IT TOGETHER
(actually, they are
SDA
readers may download It ,fi-om the li-
Serve or j-om the Embedded Systems
Start and stop conditions.
ed the IX bus using a couple of the pins
on an 8255 peripheral L/O chtp. Conse-
quently, the bufk of the example appii-
cation code 1s simple setup and house-
keeping routines. (Steven R. Wheeler’s
example appiicatlon iistmg was a bit
too long to run in this issue. interested
brar,v 12 of CLMFORUM
SCL
Figure 2
Start
75
on Compu-
chip. All I*C peripherals have the top
cessor or peripheral that responds to the
master. Slaves all have unique, 7-bit ad-
dresses that are based on the device type
and the wiring of address pins on the
nibble of an address built in. For the
PCFgj74 I/O-port expanders we’re us-
Programmmg bulietm board service at
[phone]-ed.1
By definition. a slave can be any pro-
stop
Exploring l*C