AD8137 Analog Devices, AD8137 Datasheet - Page 6

• Manufacturer Part Number: AD8137
• Description: Low Cost, Low Power 12-Bit Differential ADC Driver
• Manufacturer: Analog Devices

AD8137
ABSOLUTE MAXIMUM RATINGS
Table 4.
Parameter
Supply Voltage
V
Power Dissipation
Input Common-Mode Voltage
Storage Temperature
Operating Temperature Range
Lead Temperature (Soldering 10 sec)
Junction Temperature
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only and functional operation of the device at these or
any other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
THERMAL RESISTANCE
θ
specified for the device soldered in a circuit board in still air.
Table 5. Thermal Resistance
Package Type
SOIC-8/2-Layer
SOIC-8/4-Layer
LFCSP/4-Layer
Maximum Power Dissipation
The maximum safe power dissipation in the AD8137 package is
limited by the associated rise in junction temperature (T
the die. At approximately 150°C, which is the glass transition
temperature, the plastic changes its properties. Even tempo-
rarily exceeding this temperature limit may change the stresses
that the package exerts on the die, permanently shifting the
parametric performance of the AD8137. Exceeding a junction
temperature of 175°C for an extended period of time can result
in changes in the silicon devices, potentially causing failure.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the
human body and test equipment and can discharge without detection. Although this product features
proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy
electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance
degradation or loss of functionality.
JA
OCM
is specified for the worst-case conditions, that is, θ
θ
157
125
70
JA
θ
56
56
56
JC
Rating
12 V
V
See Figure 3
V
−65°C to +125°C
−40°C to +125°C
300°C
150°C
S+
S+
to V
to V
S−
S−
JA
Unit
°C/W
°C/W
°C/W
is
J
) on
Rev. B | Page 6 of 24
The power dissipated in the package (P
quiescent power dissipation and the power dissipated in the
package due to the load drive for all outputs. The quiescent
power is the voltage between the supply pins (V
quiescent current (I
and common-mode currents flowing to the load, as well as
currents flowing through the external feedback networks and
the internal common-mode feedback loop. The internal resistor
tap used in the common-mode feedback loop places a 1 kΩ
differential load on the output. RMS output voltages should be
considered when dealing with ac signals.
Airflow reduces θ
the package leads from metal traces, through holes, ground,
and power planes reduces the θ
Figure 3 shows the maximum safe power dissipation in the
package vs. the ambient temperature for the SOIC-8 (125°C/W)
and LFCSP (θ
4-layer board. θ
Figure 3. Maximum Power Dissipation vs. Temperature for a 4-Layer Board
3.0
2.5
2.0
1.5
1.0
0.5
0
–40
–30
JA
SOIC-8
–20 –10
JA
= 70°C/W) package on a JEDEC standard
values are approximations.
JA
. Also, more metal directly in contact with
S
). The load current consists of differential
0 10 20 30 40 50 60 70 80 90 100 110 120
AMBIENT TEMPERATURE (°C)
LFCSP
JA
.
D
) is the sum of the
S
) times the