MIC2593 Micrel Semiconductor, MIC2593 Datasheet - Page 12

• Manufacturer Part Number: MIC2593
• Description: Dual-Slot PCI Hot Plug Controller
• Manufacturer: Micrel Semiconductor

MIC2593
(decade-scale) standard capacitors.
For the +12V and –12V supplies, the output slew rate is
controlled by capacitors connected to the 12VSLEWA and
12VSLEWB pins. To determine the minimum value of the
slew rate capacitor, (C
not enter into current limit during start-up, the following
equation is used:
where C
and –12V outputs, I
thresholds and I
the “Electrical Characteristics” table. The slew rate dv/dt is
computed by:
By appropriately selecting the value of C
of the inrush current will not exceed the current limit for a
given load capacitance. Since one capacitor fixes the slew
rate for both +12V and –12V, the capacitor value should be
chosen to provide the slower slew rate of the two. Table 2
depicts the
C
Power Down Cycle
When a slot is turned off, internal switches are connected to
each of the outputs to discharge the PCI board's bypass
capacitors to ground.
M9999-042204
SLEW
Table 1. 3.3V/5V GATE Output Slew Rate Selection
C
dv dt at load
.
Table 2. 12V Output Slew Rate Selection
SLEW
C
0.001 F
0.01 F
0.1 F
1 F
C
0.001 F
0.01 F
0.1 F
1 F
LOAD
GATE
GATE
min
is the load capacitance connected to the +12V
12V output slew rate for various values of
SLEW
I
GATE(SOURCE)
LIM[12V/12MV]
I
LIM 12V 12MV
is the slew rate charge current found in
I
C
SLEW
SLEW
I
SLEW
SLEW
I
SLEW
= 22 A
), and to ensure the device does
10
= 25 A
are the current limit slow-trip
6
dv/dt (GATE)
25V/ms
2.5V/ms
0.25V/ms
0.025V/ms
dv/dt (load)
22V/ms
2.2V/ms
0.22V/ms
0.022V/ms
C
LOAD
SLEW
, the magnitude
12
Standby Mode
Standby mode is entered when any (one or more) enabled
MAIN supply input (12V
below its respective UVLO threshold. The MIC2593 supplies
two 3.3V auxiliary outputs, VAUX[A/B], satisfying PCI 2.x
specifications. These outputs are fed via the VSTBY[A/B]
input and controlled by the AUXEN[A/B] inputs or via their
SMI bus Control Registers. These outputs are independent of
the MAIN outputs: should one or more of the MAIN supply
inputs move below its UVLO thresholds, VAUX[A/B] will still
function as long as VSTBY[A/B] is present. Prior to entering
standby mode, ONA and ONB (or the MAINA and MAINB bits
in the Control Registers) inputs should be de-asserted. If this
is not done, the MIC2593 will assert /FAULT and also /INT if
interrupts are enabled, when the MIC2593 detects an under-
voltage condition on a supply input.
Circuit Breaker Functions
The MIC2593 provides an electronic circuit breaker function
that protects against excessive loads, such as short circuits,
at each supply. When the current from one or more of a slot’s
MAIN outputs exceeds the current limit threshold
(50mV/R
for –12V) for a duration greater than the overcurrent timer,
t
outputs except VAUX[A/B]) are shut off. Should the load
current exceed I
output’s V
outputs are shut off with no delay. Undervoltage conditions on
the MAIN supply inputs also trip the circuit breaker, but only
when the MAIN outputs are enabled (to signal a supply input
brown-out condition).
The VAUX[A/B] outputs have their own separate circuit
breaker functions. VAUX[A/B] do not incorporate a fast-trip
threshold, but instead regulate the output current into a fault
to avoid exceeding their operating current limit. The circuit
breaker will trip due to overcurrents on VAUX[A/B] when the
overcurrent fault timer (t
overcurrent timer prevents the circuit breaker from tripping
prematurely due to brief current transients.
Following a fault condition, the outputs can be turned on
again via the ON inputs (if the fault occurred on one of the
MAIN outputs), via the AUXEN inputs (if the fault occurred on
the AUX outputs), or by cycling both ON and AUXEN (if faults
occurred on both the MAIN and AUX outputs). A fault condi-
tion can alternatively be cleared under SMI control of the
ENABLE bits in the CNTRL[A/B] registers (See Register Bits
D[1:0]). When the circuit breaker trips, /FAULT[A/B] will be
asserted if the outputs were enabled through the Hot Plug
Interface inputs. At the same time, /INT will be asserted
(unless interrupts are masked). Note that /INT is de-asserted
by writing a Logic 1 back into the respective fault bit position(s)
in the STAT[A/B] register or the Common Status Register.
The response time (t
rent detector is set by external capacitors at the CFILTER[A/B]
pins to GND. For Slot A, CFILTER[A] is located at Pin 2; for
FLT
, the circuit breaker is tripped and all MAIN supplies (all
SENSE
SENSE
for 3.3V and 5V, 1.0A for +12V, and/or 0.2A
THFAST
to exceed V
FLT
IN
) of the MIC2593’s primary overcur-
(+12V and –12V), or cause a MAIN
, 12MV
FLT
THFAST
) expires. This use of the
IN
, 5V
(+3.3V and +5V), the
IN
and/or 3V
April 2004
IN
) drops
Micrel