MIC2593 Micrel Semiconductor, MIC2593 Datasheet - Page 14

• Manufacturer Part Number: MIC2593
• Description: Dual-Slot PCI Hot Plug Controller
• Manufacturer: Micrel Semiconductor

MIC2593
HPI-only Control Applications
In applications where the MIC2593 is controlled only by the
HPI, SMBus signals SCL, SDA, and /INT signals are con-
nected to VSTBY as shown in Figure 6. In this configuration,
the MIC2593’s /FAULT[A/B] outputs are activated after power-
on-reset and become asserted when:
Either or both external ON[A/B] and AUXEN[A/B] input sig-
nals are asserted, AND
In order to clear /FAULT[A/B] outputs once asserted, ON[A/B]
and/or AUXEN[A/B] input signals must be de-asserted. Please
see the /FAULT[A/B] pin description for additional informa-
tion.
Hot Plug Interface (HPI) Operation
Once the input supplies are above their respective UVLO
thresholds, the Hot Plug Interface can be utilized for power
control by enabling the control input pins (AUXEN[A/B] and
ON[A/B]) for each slot. In order for the MIC2593 to switch on
the VAUX supply for either slot, the AUXEN[A/B] control must
be enabled after the power-on-reset delay, t
500 s), has elapsed. The MAIN output supplies can also be
M9999-042204
• 12VIN[A/B], 12MVIN[A/B], 5VIN[A/B], 3VIN[A/B],
• The fast OC circuit breaker[A/B] has tripped, OR
• The slow OC circuit breaker[A/B] has tripped AND
• The slow OC circuit breaker[A/B] has tripped AND
• The MIC2593’s global die temperature exceeds
or VSTBY[A/B] input voltage is lower than its
respective ULVO threshold, OR
its filter timeout[A/B] has expired, OR
Slot[A/B] die temperature exceeds 140 C, OR
160 C
MAIN_OUT[A/B]
AUX_OUT[A/B]
/FAULT_[A/B]
AUXEN[A/B]
I
I
MAIN_OUT[A/B]
AUX_OUT[A/B]
VSTBY
ON[A/B]
/INT*
0
0
0
0
0
0
0
0
I
I
I
I
STEADY-STATE
STEADY-STATE
LIM(AUX)
LIM(MAIN)
UVLO
t POR
Figure 8. Hot Plug Interface Operation
+3.3V
V
IH
POR
(typically
t FLT
V
IL
14
* /INT de-asserted by software
*
enabled after t
illustrates a Hot Plug Interface operation where an overcur-
rent fault is detected by the MIC2593 controller after initiating
a power-up sequence. The figure illustrates the output re-
sponse of /FAULT, /INT, VAUX[A/B] supplies, and an exter-
nal MOSFET control MAIN[A/B] output supply, either 3.3V or
5V.
MIC2593 SMBus Address Configuration
The MIC2593 responds to its own unique address which is
assigned using A2, A1, and A0. These represent the 3 LSBs
of its 7-bit address, as shown in Table 3. These address bits
are assigned only during power up of the VSTBY[A/B] supply
input. These three bits allow up to eight MIC2593 devices in
a single system. These pins are either grounded or left
unconnected to specify a logical 0 or 1, respectively. A pin
designated as a logical 1 may also be pulled up to V
Serial Port Operation
The MIC2593 uses standard SMBus Write_Byte and
Read_Byte operations for communication with its host. The
SMBus Write_Byte operation involves sending the device’s
slave address, with the R/W bit (LSB) set to the low (write)
state, followed by a command byte and a data byte. The
SMBus Read_Byte operation is similar, but is a composite
write and read operation: the host first sends the device’s
slave address followed by the command byte, as in a write
operation. A new “Start” bit must then be sent to the MIC2593,
followed by a repeat of the slave address with the R/W bit set
to the high (read) state. The data to be read from the part may
then be clocked out. There is one exception to this rule: If the
location latched in the pointer register from the last write
operation is known to be correct (i.e., points to the desired
register within the MIC2593), then the “Receive_Byte” proce-
V
IH
V
IH
POR
t FLT
. The timing response diagram of Figure 8
V
IL
*
V
IH
April 2004
STBY
Micrel
.