ADP161 Analog Devices, Inc., ADP161 Datasheet - Page 13

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ADP161

Manufacturer Part Number
ADP161
Description
Ultralow Quiescent Current, 150 Ma, Cmos Linear Regulator Adp160/adp161
Manufacturer
Analog Devices, Inc.
Datasheet

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APPLICATIONS INFORMATION
CAPACITOR SELECTION
Output Capacitor
The ADP160/ADP161 are designed for operation with small,
space-saving ceramic capacitors, but functions with most
commonly used capacitors as long as care is with regard to the
effective series resistance (ESR) value. The ESR of the output
capacitor affects stability of the LDO control loop. A minimum
of 1 μF capacitance with an ESR of 1 Ω or less is recommended
to ensure stability of the ADP160/ADP161. Transient response
to changes in load current is also affected by output capacitance.
Using a larger value of output capacitance improves the transient
response of the ADP160/ADP161 to large changes in load current.
Figure 30 and Figure 31 show the transient responses for output
capacitance values of 1 μF and 10 μF, respectively.
Input Bypass Capacitor
Connecting a 1 μF capacitor from VIN to GND reduces the circuit
sensitivity to the printed circuit board (PCB) layout, especially
when long input traces or high source impedance are encountered.
If greater than 1 μF of output capacitance is required, the input
capacitor should be increased to match it.
1
2
1
2
CH1 100mA Ω CH2 200mV
CH1 100mA Ω CH2 200mV
Figure 31. Output Transient Response, C
Figure 30. Output Transient Response, C
T
T
CH1 = Load Current, CH2 = V
CH1 = Load Current, CH2 = V
LOAD CURRENT
LOAD CURRENT
V
V
OUT
OUT
M200µs
M200µs
T
T
10.40%
10.00%
OUT
OUT
A CH1
A CH1
OUT
OUT
= 10 μF,
= 1 μF,
62mA
74mA
Rev. 0 | Page 13 of 20
Input and Output Capacitor Properties
Any good quality ceramic capacitors can be used with the ADP160/
ADP161, as long as they meet the minimum capacitance and
maximum ESR requirements. Ceramic capacitors are manufactured
with a variety of dielectrics, each with different behavior over
temperature and applied voltage. Capacitors must have a dielectric
adequate to ensure the minimum capacitance over the necessary
temperature range and dc bias conditions. X5R or X7R dielectrics
with a voltage rating of 6.3 V or 10 V are recommended. Y5V
and Z5U dielectrics are not recommended due to their poor
temperature and dc bias characteristics.
Figure 32 depicts the capacitance vs. voltage bias characteristic
of a 0402, 1 μF, 10 V, X5R capacitor. The voltage stability of a
capacitor is strongly influenced by the capacitor size and voltage
rating. In general, a capacitor in a larger package or higher voltage
rating exhibits better stability. The temperature variation of the X5R
dielectric is about ±15% over the −40°C to +85°C temperature
range and is not a function of package or voltage rating.
Use Equation 1 to determine the worst-case capacitance accounting
for capacitor variation over temperature, component tolerance,
and voltage.
where:
C
TEMPCO is the worst-case capacitor temperature coefficient.
TOL is the worst-case component tolerance.
In this example, the worst-case temperature coefficient (TEMPCO)
over −40°C to +85°C is assumed to be 15% for an X5R dielectric.
The tolerance of the capacitor (TOL) is assumed to be 10%, and
C
Substituting these values in Equation 1 yields
Therefore, the capacitor chosen in this example meets
the minimum capacitance requirement of the LDO over
temperature and tolerance at the chosen output voltage.
BIAS
BIAS
C
C
is the effective capacitance at the operating voltage.
is 0.94 μF at 1.8 V, as shown in Figure 32.
EFF
EFF
1.2
1.0
0.8
0.6
0.4
0.2
0
= C
= 0.94 μF × (1 − 0.15) × (1 − 0.1) = 0.719 μF
0
Figure 32. Capacitance vs. Voltage Characteristic
BIAS
× (1 − TEMPCO) × (1 − TOL)
2
4
VOLTAGE
ADP160/ADP161
6
8
1
0
(1)

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