ADP5042CP-2-EVALZ Analog Devices, Inc., ADP5042CP-2-EVALZ Datasheet

ADP5042CP-2-EVALZ

Manufacturer Part Number

ADP5042CP-2-EVALZ

Description

Micro Pmu With 0.8 A Buck, Two 300 Ma Ldos Supervisory, Watchdog And Manual Reset

Manufacturer

Analog Devices, Inc.

Datasheet

1.ADP5042CP-2-EVALZ.pdf (32 pages)

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FEATURES

Input voltage range: 2.3 V to 5.5 V

One 0.8 A buck regulator

Two 300 mA LDOs

20-lead, 4 mm × 4 mm LFCSP package

Initial regulator accuracy: ±1%

Overcurrent and thermal protection

Soft start

Undervoltage lockout

Open drain processor reset with threshold monitoring

±1.5% threshold accuracy over the full temperate range

Guaranteed reset output valid to V

Dual watchdog for secure systems

Buck key specifications

LDOs key specifications

GENERAL DESCRIPTION

The ADP5042 combines one high performance buck regulator

and two low dropout regulators (LDO) in a small 20-lead

LFCSP to meet demanding performance and board space

requirements.

The high switching frequency of the buck regulator enables

use of tiny multilayer external components and minimizes the

board space.

The MODE pin selects the buck mode of operation. When set

to logic high, the buck regulators operate in forced PWM mode.

When the MODE pin is set to logic low, the buck regulators

operate in PWM mode when the load is around the nominal

value. When the load current falls below a predefined threshold

the regulator operates in power save mode (PSM) improving

the light-load efficiency.

Rev. 0

Information furnished by Analog Devices is believed to be accurate and reliable. However, no

responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other

rights of third parties that may result from its use. Specifications subject to change without notice. No

license is granted by implication or otherwise under any patent or patent rights of Analog Devices.

Trademarks and registered trademarks are the property of their respective owners.

Watchdog 1 controls reset

Watchdog 2 controls reset and regulators power cycle

Current mode topology for excellent transient response

3 MHz operating frequency

Uses tiny multilayer inductors and capacitors

Mode pin selects forced PWM or auto PFM/PSM modes

100% duty cycle low dropout mode

Low V

Stable with1 μF ceramic output capacitors

High PSRR, 60 dB PSRR up to 1 kHz/10 kHz

Low output noise

Low dropout voltage: 150 mV at 300 mA load

−40°C to +125°C junction temperature range

110 μV rms typical output noise at V

from 1.7 V to 5.5 V

= 1 V

OUT

= 2.8 V

Micro PMU with 0.8 A Buck, Two 300 mA LDOs

Supervisory, Watchdog and Manual Reset

One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.

Tel: 781.329.4700

Fax: 781.461.3113

VIN1 = 2.3V

VIN2 = 1.7V

VIN3 = 1.7V

The low quiescent current, low dropout voltage, and wide input

voltage range of the ADP5042 LDOs extend the battery life of

portable devices. The two LDOs maintain power supply

rejection greater than 60 dB for frequencies as high as 10 kHz

while operating with a low headroom voltage.

Each regulator is activated by a high level on the respective

enable pin. The ADP5042 is available with factory programmable

default output voltages and can be set to a wide range of options.

The ADP5042 contains supervisory circuits that monitor

power supply voltage levels and code execution integrity in

microprocessor-based systems. They also provide power-on

reset signals. An on-chip dual watchdog timer can reset the

microprocessor or power cycle the system (Watchdog 2) if it

fails to strobe within a preset timeout period.

TO 5.5V

4.7µF

1µF

FILT

HIGH LEVEL BLOCK DIAGRAM

= 30Ω

OFF

AVIN

VIN3

VIN1

VIN2

EN1

EN2

EN3

AVIN

EN_BK

EN_LDO1

EN_LDO2

(ANALOG)

(DIGITAL)

Figure 1.

BUCK

LDO1

LDO2

AGND

MODE

VOUT2

nRSTO

VOUT3

WSTAT

VOUT1

PGND

WDI1

WDI2

ADP5042

FPWM

www.analog.com

1µH

PSM/PWM

1µF

10µF

300mA

800mA

OUT2

OUT3

OUT1

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