SPC41A Sunplus Technology Co., Ltd., SPC41A Datasheet - Page 5

• Manufacturer Part Number: SPC41A
• Description: 40KB SOUND CONTROLLER
• Manufacturer: Sunplus Technology Co., Ltd.

6. FUNCTIONAL DESCRIPTIONS
6.1. CPU
The 8-bit microprocessor of SPC41A is a high performance
processor equipped with Accumulator, Program Counter, X
Register, Stack pointer and Processor Status Register (this is the
same as the 6502 instruction structure).
perform with 6.0MHz (max.) depending on the application
specifications.
6.2. Oscillator
The SPC41A supports AT-cut parallel resonant oscillated Crystal /
Resonator or RC Oscillator or external clock sources by using the
bonding option (select one from those three types). The design
of application circuit should follow the vendors’ specifications or
recommendations.
X’TAL/ROSC circuits for most applications:
6.3. Bonding Option
The SPC41A has the following bonding option:
6.4. ROM Area
The SPC41A provides a 40K-byte ROM that can be defined as the
program area, audio data area, or both. To access ROM, users
should program the BANK SELECT Register, choose bank, and
access address to fetch data.
6.5. RAM Area
The SPC41A total RAM consists of 128 bytes (including Stack) at
locations from $80 through $FF.
© Sunplus Technology Co., Ltd.
Proprietary & Confidential
hSupports Crystal Resonator or Rosc (with bonding option).
(a) Crystal or
XI/R
20 pf
Ceramic Resonator
Connections
SPC41A
XO
The diagrams listed below are typical
20 pf
VDD
Rosc
(b) RC Oscillator
XI/R
Connections
SPC41A
SPC41A is able to
XO
5
6.7. Speech and Melody
Since the SPC41A provides a large ROM and wide range of CPU
operation speeds, it is most suitable for speech and melody
synthesis.
For speech synthesis, the SPC41A can provide NMI for accurate
sampling frequency. Users can record or synthesize the sound
and digitize it into the ROM. The sound data can be played back
in the sequence of the control functions as designed by the user's
program. Several algorithms are recommended for high fidelity
and compression of sound including PCM, LOG PCM, and
ADPCM.
For melody synthesis, the SPC41A provides the dual tone mode.
After selecting the dual tone mode, users only need to fill either
TMA or TMB, or both TMA and TMB to generate expected
frequency for each channel. The hardware will toggle the tone
wave automatically without entering into an interrupt service
routine. Users are able to simulate musical instruments or sound
effects by simply controlling the envelope of tone output.
6.6. Map of Memory and I/Os
*I/O PORT:
*NMI SOURCE:
*INT SOURCE:
―
―
―
―
―
―
―
―
―
INTA (from TIMER A)
I/O CONFIG $0000
INTA (from TIMER A)
INTB (from TIMER B)
CPU CLK / 1024
CPU CLK / 8192
CPU CLK / 65536
EXT INT
PORT IOA
IOC
IOD
$0004
$0005
$0002
$0001
$00600
$08000
$0FFFF
*MEMORY MAP (From ROM view)
$00000
$00080
$00100
$00200
$0E000
SUNPLUS TEST PROGRAM
USER RAM and STACK
USER'S PROGRAM &
HW register, I/Os
ROM BANK #0
DUMMY AREA
ROM BANK #1
DATA AREA
SPC41A
UNUSED
SEP. 04, 2001
Version: 1.8