LM3S1435 Luminary Micro, Inc, LM3S1435 Datasheet - Page 28
LM3S1435
Manufacturer Part Number
LM3S1435
Description
Lm3s1435 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S1435.pdf
(521 pages)
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Architectural Overview
28
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GPIOs
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Two PWM comparators
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PWM generator
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Dead-band generator
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Flexible output control block with PWM output enable of each PWM signal
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Can initiate an ADC sample sequence
21-46 GPIOs, depending on configuration
5-V-tolerant input/outputs
Programmable interrupt generation as either edge-triggered or level-sensitive
Low interrupt latency; as low as 6 cycles and never more than 12 cycles
Bit masking in both read and write operations through address lines
Can initiate an ADC sample sequence
Pins configured as digital inputs are Schmitt-triggered.
Programmable control for GPIO pad configuration:
Load value updates can be synchronized
Produces output signals at zero and load value
Comparator value updates can be synchronized
Produces output signals on match
Output PWM signal is constructed based on actions taken as a result of the counter and
PWM comparator output signals
Produces two independent PWM signals
Produces two PWM signals with programmable dead-band delays suitable for driving a
half-H bridge
Can be bypassed, leaving input PWM signals unmodified
PWM output enable of each PWM signal
Optional output inversion of each PWM signal (polarity control)
Optional fault handling for each PWM signal
Synchronization of timers in the PWM generator blocks
Synchronization of timer/comparator updates across the PWM generator blocks
Interrupt status summary of the PWM generator blocks
Preliminary
July 25, 2008
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