LM3S6911 Luminary Micro, Inc, LM3S6911 Datasheet - Page 452

• Manufacturer Part Number: LM3S6911
• Description: Lm3s6911 Arm Microcontroller
• Manufacturer: Luminary Micro, Inc

Signal Tables
452
Pin Name
I2C0SCL
I2C0SDA
I2C1SCL
I2C1SDA
ERBIAS
GNDPHY
GNDPHY
GNDPHY
CMOD1
GNDA
GNDA
LED0
LED1
MDIO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
LDO
NC
Pin Number
M12
C12
B10
L10
K10
F10
F12
C11
J10
F11
J12
J11
M6
K3
C4
C5
H3
K5
K6
B6
B5
A5
K4
C8
C9
E3
B1
J3
L6
L9
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
Buffer Type
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
OD
OD
-
Description
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
12.4 KOhm resistor (1% precision) used
internally for Ethernet PHY.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GND of the Ethernet PHY
GND of the Ethernet PHY
GND of the Ethernet PHY
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
I2C module 1 clock
I2C module 1 data
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
MII LED 0
MII LED 1
MDIO of the Ethernet PHY
No connect. Leave the pin electrically
unconnected/isolated.
July 26, 2008