LM3S6952 Luminary Micro, Inc, LM3S6952 Datasheet - Page 534
LM3S6952
Manufacturer Part Number
LM3S6952
Description
Lm3s6952 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S6952.pdf
(601 pages)
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Signal Tables
534
Pin Name
I2C0SCL
I2C0SDA
ERBIAS
GNDPHY
GNDPHY
GNDPHY
CMOD0
CMOD1
Fault
GNDA
GNDA
IDX0
LED0
LED1
MDIO
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
GND
HIB
LDO
Pin Number
100
65
76
41
99
15
21
33
39
45
54
57
63
69
82
87
94
97
42
85
86
51
70
71
59
60
58
9
4
7
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
O
O
O
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
I
Buffer Type
Analog
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
Description
CPU Mode bit 0. Input must be set to logic 0
(grounded); other encodings reserved.
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
12.4 KOhm resistor (1% precision) used
internally for Ethernet PHY.
PWM Fault
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
GND of the Ethernet PHY
GND of the Ethernet PHY
GND of the Ethernet PHY
An output that indicates the processor is in
hibernate mode.
I2C module 0 clock
I2C module 0 data
QEI module 0 index
Low drop-out regulator output voltage. This
pin requires an external capacitor between
the pin and GND of 1 µF or greater. The LDO
pin must also be connected to the VDD25 pins
at the board level in addition to the decoupling
capacitor(s).
MII LED 0
MII LED 1
MDIO of the Ethernet PHY
July 25, 2008
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