LM3S8970 Luminary Micro, Inc, LM3S8970 Datasheet - Page 476
LM3S8970
Manufacturer Part Number
LM3S8970
Description
Lm3s8970 Arm Microcontroller
Manufacturer
Luminary Micro, Inc
Datasheet
1.LM3S8970.pdf
(529 pages)
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Signal Tables
476
Pin Number
B10
B12
C10
C11
C12
B11
B2
B3
B4
B5
B6
B7
B8
B9
C1
C2
C3
C4
C5
C6
C7
C8
C9
Pin Name
SSI1Fss
I2C0SCL
I2C0SDA
SSI1Rx
GNDPHY
GNDPHY
VCCPHY
SWDIO
CMOD1
VDD25
GNDA
VDDA
VDDA
GND
PB5
PC2
TDI
PC1
TMS
PE2
PE1
PE7
PE6
GND
GND
PB2
PB3
NC
NC
NC
Preliminary
Pin Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
-
-
-
-
-
-
-
-
-
-
I
I
I
I
I
Buffer Type
Power
Power
Power
Power
Power
Power
Power
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
TTL
OD
OD
-
-
-
Description
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
No connect. Leave the pin electrically
unconnected/isolated.
The ground reference for the analog circuits
(ADC, Analog Comparators, etc.). These are
separated from GND to minimize the electrical
noise contained on VDD from affecting the
analog functions.
Ground reference for logic and I/O pins.
GPIO port B bit 5
GPIO port C bit 2
JTAG TDI
GPIO port C bit 1
JTAG TMS and SWDIO
JTAG TMS and SWDIO
CPU Mode bit 1. Input must be set to logic 0
(grounded); other encodings reserved.
GPIO port E bit 2
SSI module 1 receive
GPIO port E bit 1
SSI module 1 frame
GPIO port E bit 7
GPIO port E bit 6
Positive supply for most of the logic function,
including the processor core and most
peripherals.
Ground reference for logic and I/O pins.
Ground reference for logic and I/O pins.
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
The positive supply (3.3 V) for the analog
circuits (ADC, Analog Comparators, etc.).
These are separated from VDD to minimize
the electrical noise contained on VDD from
affecting the analog functions.
GND of the Ethernet PHY
GND of the Ethernet PHY
VCC of the Ethernet PHY
GPIO port B bit 2
I2C module 0 clock
GPIO port B bit 3
I2C module 0 data
July 25, 2008
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