CLA70000 Zarlink Semiconductor, CLA70000 Datasheet - Page 12

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CLA70000

Manufacturer Part Number
CLA70000
Description
High Density CMOS Gate Arrays
Manufacturer
Zarlink Semiconductor
Datasheet
CLA70000 Series
AC Charcteristics
Note : Commercial worst case is 4.5V, 70 C operating
12
INTERMEDIATE BUFFER CELLS
OUTPUT BUFFER CELLS
INTERNAL CORE CELLS
NAND2
IBCMOS1
Name
NOR2
IBGATE
INV2
Name
Name
OP12
DF
OP3
OP6
IBDF
Industrial worst case is 4.5V, 85 C operating
Cells
Cells
1
1
1
1
Cells
-
-
-
-
-
-
Large 2 Input NAND
Gate +2 Input NOR
Master Slave D-type
CMOS input buffer
2-Input NAND Gate
Invertor Dual Drive
with 2 input NAND
2-Input NOR Gate
D-Type Flip-Flop
Standard Output
Medium Output
Master Slave
Large Output
Description
Flip-Flop
Description
Description
Buffer
Buffer
Buffer
gate
Symbol
Symbol
Symbol
tpLH
tpHL
tpLH
tpHL
tpLH
tpLH
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tpLH
tpHL
tpHL
tpLH
tpLH
tpHL
Fanout =10pF
Propagation
Propagation
Propagation
Delay (ns)
Delay (ns)
Fanout =2
Typical
Delay (ns)
Fanout =2
Typical
Typical
0.34
0.27
0.48
0.50
0.60
0.45
0.27
0.18
0.39
0.30
0.50
0.22
0.54
0.55
0.73
0.49
0.50
0.33
0.38
0.25
0.88
0.71
1.24
1.31
1.58
1.17
10pF
0.70
0.47
1.01
0.79
1.30
0.57
1.40
1.44
2
1.90
1.27
1.30
0.85
0.99
0.66
2
Commercial
Commercial
Commercial
Fanout
Fanout
Fanout
Worst case propagation Delay (ns)
Worst case propagation Delay (ns)
Worst case propagation Delay (ns)
1.02
0.84
1.44
1.42
1.68
1.21
50pF
0.84
0.56
1.29
1.04
1.81
0.80
1.60
1.55
4
6.49
4.40
3.59
2.42
2.14
1.50
4
10pF

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