MT9160AS Mitel Semiconductor, MT9160AS Datasheet
MT9160AS
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MT9160AS Summary of contents
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... Digital Interface STB/F0i CLOCKin 5 Volt Multi-Featured Codec (MFC) MT9160AE MT9160AS Description The MT9160 5V Multi-featured Codec incorporates a built-in Filter/Codec, gain control and programmable sidetone path as well as on-chip anti-alias filters, reference voltage and bias source. The device supports both A-Law and -Law requirements. ...
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MT9160 20 PIN SOIC 24 PIN PDIP Pin Description Pin # Name SOIC DIP Bias Voltage (Output). (V Bias amplifiers. Connect 0.1 µF capacitor Reference Voltage for Codec (Output). Nominally [(V Ref ...
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Preliminary Information Pin Description (continued) Pin # Name SOIC DIP Data Output. A high impedance three-state digital output for 8 bit wide channel data out being sent to the Layer 1 transceiver. Data is shifted out via ...
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MT9160 Overview The 5V Multi-featured Codec complete Analog/Digital and conversion of audio signals (Filter/Codec) and an analog interface to a standard handset transmitter and receiver (Transducer Interface). The receiver amplifier is capable of driving a 300 ohm load. Each of ...
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Preliminary Information Companding law selection for the Filter/Codec is provided by the A/µ companding control bit while the coding scheme is controlled by the Smag/CCITT control bit. The A/ control bit is logically OR’ed with the A/ pin providing access ...
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... Flexible Digital Interface A serial link is required to transport data between the MT9160 and an external digital transmission device. The MT9160 utilizes the ST-BUS architecture defined by Mitel Semiconductor but also supports a strobed data interface found on many standard Codec devices. This interface is commonly referred serial ...
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Preliminary Information The data streams operate at 2048 kb/s and are Time Division Multiplexed into 32 identical channels of 64 kb/s bandwidth. A frame pulse (a 244 nSec low going pulse) is used to parse the continuous serial data streams ...
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MT9160 F0i DSTi, CHANNEL 0 CHANNEL 1 DSTo D-channel C-channel LSB first MSB first for C, B1- & B2- for D- Channel Codec, Digital gain and tone generation) and to provide the channel timing requirements. The MT9160 uses only the ...
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Preliminary Information IRQ FP n-3 n-2 DSTo/ DSTi Di-bit Group I II Receive D-Channel No preset value * note that frame n+4 is equivalent to frame n of the next cycle. FP C4i C2 DSTo/ D0 ...
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MT9160 An interrupt output is provided (IRQ) to synchronize microprocessor access to the D-Channel register during valid ST-BUS periods only. IRQ will occur every fourth (eighth in 8 kb/s mode) ST-BUS frame at the beginning of the third (second in ...
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Preliminary Information affect operation since the bit cell period at 128 kb/s and 256 kb/s is relatively large. There is a one frame delay through the FDI circuit for asynchronous operation. Refer to the specifications of Figures 12 & 13 ...
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MT9160 Register Summary Gain Control Register 1 RxINC RxFG RxFG Receive Gain RxFG 2 Setting (dB (default RxFG = Receive ...
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Preliminary Information Path Control - - - DrGain When high, the receiver driver gain is set to -6 dB, with sidetone. When low, the receiver driver gain is set to 0 dB, with no sidetone. Control Register ...
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MT9160 Control Register 2 CEn DEn CEn When high, data written into the C-Channel register (address 05h) is transmitted during channel 1 on DSTo. When low, the channel 1 timeslot is tri-stated on DSTo. Channel 1 ...
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Preliminary Information C-Channel Register Micro-port access to the ST-BUS C-Channel information read and write D-Channel Register D7-D0 Data written to this register will be transmitted every frame, in ...
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MT9160 Applications Figure 9 shows an application in a digital phone set. Various configurations of pair gain drops are depicted in Figures 10a and 10b using the MT9125 and MT9126, respectively. 330 + 0.1 F 511 100K ...
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Preliminary Information 1 SLIC Gain Pair MH88622 MT9160 2 SLIC Gain Pair MH88622 7-93 ...
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MT9160 1 SLIC Gain Pair MH88622 7-94 Preliminary Information 2 SLIC Gain Pair MH88622 ...
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Preliminary Information Absolute Maximum Ratings Parameter 1 Supply Voltage 2 Voltage on any I/O pin 3 Current on any I/O pin (transducers excluded) 4 Storage Temperature 5 Power Dissipation (package) Recommended Operating Conditions Characteristics 1 Supply Voltage 2 TTL Input ...
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MT9160 DC Electrical Characteristics Characteristics 1 Input HIGH Voltage TTL inputs 2 Input LOW Voltage TTL inputs 3 Input HIGH Voltage CMOS inputs 4 Input LOW Voltage CMOS inputs 5 VBias Voltage Output 6 V Output Voltage Ref 7 Input ...
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Preliminary Information † AC Characteristics for A/D (Transmit) Path A-Law, at the Codec. (V =1.0 volts and V Ref Characteristics 1 Analog input equivalent to overload decision 2 Absolute half-channel gain M ± to Dout Tolerance at all other transmit ...
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MT9160 † AC Characteristics for D/A (Receive) Path (V =1.0 volts and V =2.5 volts.) Ref Bias Characteristics 1 Analog output at the Codec full scale 2 Absolute half-channel gain. Din to HSPKR± Tolerance at all other receive filter settings ...
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Preliminary Information AC Electrical Characteristics Characteristics 1 Absolute path gain gain adjust = 0dB † AC Electrical Characteristics are over recommended temperature range & recommended power supply voltages. ‡ Typical figures are at 25 °C and are for design aid ...
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MT9160 AC Electrical Characteristics Characteristics 1 C4i Clock Period 2 C4i Clock High period 3 C4i Clock Low period 4 C4i Clock Transition Time 5 F0i Frame Pulse Setup Time 6 F0i Frame Pulse Hold Time 7 DSTo Delay 8 ...
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Preliminary Information AC Electrical Characteristics Characteristics 1 BCL Clock Period 2 BCL Pulse Width High 3 BCL Pulse Width Low 4 BCL Rise/Fall Time 5 Strobe Pulse Width 6 Strobe setup time before BCL falling 7 Strobe hold time after ...
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MT9160 AC Electrical Characteristics Characteristics 1 Bit Cell Period 2 Frame Jitter 3 Bit 1 Dout Delay from STB going high 4 Bit 2 Dout Delay from STB going high 5 Bit n Dout Delay from STB going high 6 ...
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Preliminary Information AC Electrical Characteristics Characteristics 1 Input data setup 2 Input data hold 3 Output data delay 4 Serial clock period 5 SCLK pulse width high 6 SCLK pulse width low 7 CS setup-Intel 8 CS setup-Motorola 9 CS ...
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MT9160 Notes: 7-104 Preliminary Information ...