CS1112 ON Semiconductor, CS1112 Datasheet - Page 4

• Manufacturer Part Number: CS1112
• Description: Quad Power Output Driver
• Manufacturer: ON Semiconductor

ELECTRICAL CHARACTERISTICS (continued)
5.5 V < V
PACKAGE PIN DESCRIPTION
1. Guaranteed by design.
Serial Peripheral Interface
SCLK Clock Period
MAX Input Capacitance
V
V
SCLK High Time
SCLK Low Time
SI Setup Time
SI Hold Time
SO Rise Time
SO Fall Time
CSB Setup Time
CSB Hold Time
SO Delay Time
Xfer Delay Time
OUT
OUT
PACKAGE PIN #
24 Lead SOIC
High
Low
17, 18, 19, 20
PWR
5, 6, 7, 8
Characteristic
10
11
12
13
14
1
2
3
4
9
< 25 V, (Outputs Functional); unless otherwise specified.)
V
C
SI, SCLK, Note 1.
SO, I
SO, I
F
F
SI = 0.8 V/2.0 V to SCLK = 2.0 V at 4.0 MHz;
SCLK = 2.0 V to SI = 0.8 V/2.0 V at 4.0 MHz;
C
C
CSB = 0.8 V to SCLK = 2.0 V
SCLK = 0.8 V to CSB = 2.0 V
SCLK = 0.8 V to SO Data Valid, V
CSB rising edge to next falling edge.
PIN SYMBOL
SCLK
SCLK
PWR
O
LD
LD
(see Figure 1)
(see Figure 1)
Note 1. (see Figure 1)
Note 1. (see Figure 1)
Note 1.
Note 1.
(see Figure 1) Note 1.
(see Figure 1) Note 1.
C
(see Figure 1); Note 1.
Note 1.
= 200 pF
LD
= 200 pF (0.1 V
= 200 pF (0.9 V
OH
OL
OUT0
OUT1
SCLK
V
GND
CSB
V
= 14 V
IN0
IN1
SO
= 4.0 MHz, SCLK = 2.0 V to 2.0 V
= 4.0 MHz, SCLK = 0.8 V to 0.8 V
= 200 pF at 4.0 MHz
PWR
SI
DD
= 1.0 mA
= 1.0 mA
(9.0 V < V
Test Conditions
http://onsemi.com
DD
DD
CS1112
PWR
to 0.9 V
to 0.1 V
4
< 17 V, 4.5 V < V
DD
DD
Input voltage to bias logic and control circuitry.
Input voltage to bias gate drive circuitry.
Open drain output one.
Parallel input one.
Ground Reference.
Parallel input two.
Open drain output two.
SPI serial input.
SPI active low chip select.
SPI clock input.
SPI serial output.
DD
);
);
= 5.0 V
DD
V
< 5.5 V, –40 C < T
DD
Min
250
125
125
1.0
25
25
60
75
–
–
–
–
–
– 1.0
FUNCTION
Typ
25
65
–
–
–
–
–
–
–
–
–
–
–
–
J <
125 C,
Max
125
0.5
12
50
50
–
–
–
–
–
–
–
–
–
Unit
pF
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
V
V
s