LT1186 Linear Technology, LT1186 Datasheet - Page 14

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LT1186

Manufacturer Part Number
LT1186
Description
DAC Programmable CCFL Switching Regulator(Bits-to-NitsTM)
Manufacturer
Linear Technology
Datasheet

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APPLICATIONS
LT1186F
lation due to its shunt capacitance. Use a decoupling
resistor of several kilohms between the I
I
mally, this resistor is not required.
In some applications, the maximum programming current
required at the I
less than the full-scale output current of the DAC, which is
50 A. The system designer can either limit the maximum
programming current through software built into the system,
or use a current splitter which shunts a percentage of the full-
scale current from the I
in Figure 3. A divider string is used from a reference voltage
to set up a voltage level equal to the I
or 465mV. The main current flowing in the divider string
should be chosen to swamp out the effects of the shunted
current into the divider string.
Grounded Lamp Configuration
In a grounded lamp configuration, the low voltage side of
the lamp connects directly to the LT1186F DIO pin. This
pin is the common connection between the cathode and
anode of two internal diodes. In previous grounded lamp
solutions, these diodes were discrete units and are now
integrated onto the IC, saving cost and board space.
Bidirectional lamp current flows in the DIO pin and thus,
the diodes conduct alternately on half cycles. Lamp cur-
rent is controlled by monitoring one-half of the average
lamp current. The diode conducting on negative half
cycles has one-tenth of its current diverted to the CCFL pin
and nulls against the source current provided by the lamp
current programmer circuit. The compensation capacitor
on the CCFL V
an averaging function to the rectified sinusoidal lamp
current. Therefore, input programming current relates to
one-half of average lamp current.
14
I
OUT
OUT
FULL-SCALE
50 A
pin if excessive trace stray capacitance exists. Nor-
I
V1
(1 – X)I
C
R1
R2
XI
CCFL
pin provides stable loop compensation and
U
pin for a maximum lamp current will be
I1
V(I
465mV
CCFL
V
REF
CCFL
R3
V(I
R4
INFORMATION
Figure 3
)
U
pin. A splitter circuit is illustrated
CCFL
)
I = 50 A
0 < X < 1
SELECT V1 WITHIN THE DAC I
COMPLIANCE RANGE
(EX. V1 = 2V FOR V
CHOOSE I1 >> (1 – X)I
R1 = (V1 – 0.465)/(X)(50 A)
R2 = (V1 – 0.465)/(1 – X)(50 A)
R3 = (V
R4 = 0.465R3/[(1 – X) 50 AR3
CCFL
W
+ (V
REF
REF
– 0.465)/I1
summing voltage,
CCFL
– 0.465)]
CC
pin and the
= 3.3V OR 5V)
U
OUT
LT1186F • F03
The transfer function between lamp current and input
programming current must be empirically determined and
is dependent on the particular lamp/display housing com-
bination used. The lamp and display housing are a distrib-
uted loss structure due to parasitic lamp-to-frame capaci-
tance. This means that the current flowing at the high-
voltage side of the lamp is higher than what is flowing at
the DIO pin side of the lamp. The input programming
current is set to control lamp current at the high-voltage
side of the lamp, even though the feedback signal is the
lamp current at the bottom of the lamp. This ensures that
the lamp is not overdriven which can degrade the lamp’s
operating lifetime. Therefore, the full scale current of the
DAC does not necessarily correspond to the current re-
quired to set maximum lamp current.
Floating Lamp Configuration
In a floating lamp configuration, the lamp is fully floating
with no galvanic connection to ground. This allows the
transformer to provide symmetric differential drive to the
lamp. Balanced drive eliminates the field imbalance asso-
ciated with parasitic lamp-to-frame capacitance and re-
duces “thermometering” (uneven lamp intensity along the
lamp length) at low lamp currents.
Carefully evaluate display designs in relation to the physi-
cal layout of the lamp, its leads and the construction of the
display housing. Parasitic capacitance from any high
voltage point to DC or AC ground creates paths for
unwanted current flow. This parasitic current flow de-
grades electrical efficiency and losses up to 25% have
been observed in practice. As an example, at a Royer
operating frequency of 60kHz, 1pF of stray capacitance
represents an impedance of 2.65M . With an operating
lamp voltage of 400V and an operating lamp current of
6mA, the parasitic current is 150 A. This additional cur-
rent must be supplied by the transformer secondary.
Layout techniques that increase parasitic capacitance
include long high voltage lamp leads, reflective metal foil
around the lamp and displays supplied in metal enclo-
sures. Losses for a good display are under 5%, whereas,
losses for a bad display range from 5% to 25%. Lossy
displays are the primary reason to use a floating lamp
configuration. Providing symmetric, differential drive to
the lamp reduces the total parasitic loss by one-half.

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