LT1793 Linear Technology, LT1793 Datasheet - Page 7

• Manufacturer Part Number: LT1793
• Description: Low Noise/ Picoampere Bias Current/ JFET Input Op Amp
• Manufacturer: Linear Technology

TYPICAL PERFOR
A
LT1793 vs the Competition
With improved noise performance, the LT1793 in the
PDIP directly replaces such JFET op amps as the OPA111
and the AD645. The combination of low current and
voltage noise of the LT1793 allows it to surpass most dual
and single JFET op amps. The LT1793 can replace many
of the lowest noise bipolar amps that are used in amplify-
ing low level signals from high impedance transducers.
The best bipolar op amps (with higher current noise) will
eventually lose out to the LT1793 when transducer im-
pedance increases.
PPLICATI
40
35
30
25
15
10
20
– 75
Short-Circuit Output Current
vs Temperature
Figure 1. Comparison of LT1793, OP215, and AD822
Input Bias Current vs Common Mode Range
V
S
= 15V
– 50
–100
100
–20
–40
–60
–80
80
60
40
20
– 25
0
–15
TEMPERATURE ( C)
SINK
CURRENT NOISE = 2qI
0
O
–10
25
COMMON MODE RANGE (V)
AD822
U
SOURCE
S
–5
50
I FOR ATIO
U
75
W
0
B
100
A
1793 G19
5
OP215
U
125
W
CE
LT1793
10
1793 F01
C
15
HARA TERISTICS
4
5
3
– 75
Supply Current vs Temperature
U
– 50
C
– 25
TEMPERATURE ( C)
0
V
V
S
S
= 15V
= 5V
25
The extremely high input impedance (10
the input bias current is almost constant over the entire
common mode range. Figure 1 shows how the LT1793
stands up to the competition. Unlike the competition, as the
input voltage is swept across the entire common mode
range the input bias current of the LT1793 hardly changes.
As a result the current noise does not degrade. This makes
the LT1793 the best choice in applications where an
amplifier has to buffer signals from a high impedance
transducer.
Offset nulling will be compatible with these devices with the
wiper of the potentiometer tied to the negative supply
(Figure 2a). No appreciable change in offset voltage drift
50
2
3
–
+
75
1
15V
(a)
100
5
7
50k
1793 G20
– 15V
125
4
6
V
OS
= 13mV
300p
100p
0.3p
30n
10n
30p
10p
3n
1n
3p
1p
Figure 2
0
Input Bias and Offset Currents
vs Chip Temperature
V
V
S
CM
= 15V
= –10 TO 13V
25
2
3
TEMPERATURE ( C)
–
+
1
50
10k
CURRENT
15V
(b)
13
5
7
10k
50k
BIAS
– 15V
75
) assures that
4
OFFSET
CURRENT
LT1793
6
V
OS
100
= 1.3mV
1793 F02
1793 G21
7
125