LT6558 Linear Technology, LT6558 Datasheet - Page 9

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LT6558

Manufacturer Part Number
LT6558
Description
Single Supply Triple Video Amplifier
Manufacturer
Linear Technology
Datasheet

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Programmable Input Bias
The LT6558 contains circuitry that provides a user-pro-
grammed bias voltage to the inputs of all three amplifi er
sections. The internal biasing feature is designed to mini-
mize external component count in AC-coupled applica-
tions, but may be defeated if external biasing is desired.
Figure 1 shows the simplifi ed equivalent circuit feeding
the noninverting input of each amplifi er. A programming
resistor from Pin 16 to GND (Pin 2) establishes the nominal
APPLICATIONS INFORMATION
Figure 1. Simplifi ed Programmable Input Bias Circuit Diagram
Figure 2. Simplifi ed Shutdown Circuit Diagram
IN
40k
2.5k
EN
(3a) Open Drain or Open Collector
DISABLE
V
EN
+
6558 F01
V
+
CIRCUITRY
BIAS
9.1k
I =
6558 F02
V
Figure 3. Suitable Shutdown Pin Drive Circuits
R
PIN16
SET
1
LT6558
V
+
2
no-signal amplifi er input bias condition according to the
following relationship:
where V
For single 5V supply operation, a 158Ω programming
resistor is generally optimal. In applications that demand
maximum amplifi er linearity, or if external biasing is
preferred (in DC-coupled applications, for example), the
internal biasing circuitry may be disabled by leaving Pin
16 open. With BCV (Pin 16) open, input loading is ap-
proximately 450kΩ.
Shutdown Control
The LT6558 may be placed into a shutdown mode, where
all three amplifi er sections are deactivated and power sup-
ply draw is reduced to approximately 10µA. When the EN
pin is left open, an internal 40k pull-up resistor brings the
pin to V
the pin more than approximately 1.5V below V
able the LT6558 (see Figure 2 for equivalent circuit). The
pull-down current required to activate the part is typically
125µA. In most applications, the EN pin is simply con-
nected to ground (for continuous operation) or driven
directly by a CMOS-level logic gate (see Figure 3 for
examples). Response time is typically 50ns for enabling,
and 1µs for shutdown. In shutdown mode, the feedback
resistors remain connected between the output pins and
the individual ground (or V
V
BIAS IN
(3b) CMOS Gate with Shared Supply
EN
+
DISABLE
( )
PIN16
and the part enters the shutdown mode. Pulling
=
V
= 0.044V typical.
PIN
R
16
SET
• .
9 1
1
k
LT6558
V
connected) pins.
+
2
6558 F03
LT6558
+
will en-
9
6558f

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