LTC1518 Linear Technology, LTC1518 Datasheet - Page 8

• Manufacturer Part Number: LTC1518
• Description: 52Mbps Precision Delay RS485 Quad Line Receivers
• Manufacturer: Linear Technology

When the inputs are accidentally shorted (by cutting
through a cable, for example), the short-circuit fail-safe
feature will guarantee a high output logic level. Note also
that if the line driver is removed and the termination
resistors are left in place, the receiver will see this as a
“short” and output a logic high.
Both of these fail-safe features will keep the receiver from
outputting false data pulses under fault conditions.
Single-Ended Applications
Over short distances, the LTC1518/LTC1519 can be con-
figured to receive single-ended data by tying one input to
a fixed bias voltage and connecting the other input to the
driver output. In such applications, standard high speed
CMOS logic may be used as a driver for the LTC1518/
LTC1519. With a 22k minimum input resistance, the
receiver trip points may be easily adjusted to accommo-
LTC1518/LTC1519
APPLICATIONS
8
(CMOS INPUT)
MC74ACT04
(TTL INPUT)
MC74AC04
Figure 6a. Single-Ended Receiver
U
0.01 F
PC TRACE
INFORMATION
U
5V
2.2k
2.2k
W
–
LTC1518
LTC1519
+
Figure 6c. Self Biased Single Ended Receiver
1/4
(CMOS INPUT)
(TTL INPUT)
MC74ACT04
MC74AC04
1518/19 F06a
U
PC TRACE
0.01 F
date different driver output swings by changing the resis-
tor divider at the fixed input. Figure 6a shows a single-
ended receiver configuration with the driver and receiver
connected via PC traces. Note that at very high speeds,
transmission line and driver ringing effects must be con-
sidered. Motorola’s MECL System Design Handbook serves
as an excellent reference for transmission line and termi-
nation effects. To mitigate transmission errors and duty
cycle distortion due to driver ringing, a small output filter
or a dampening resistor on the driver’s V
as shown in Figure 6b. With an open circuit voltage of 3.3V
at both inputs, the receivers can be used without an
external bias applied to the fixed inputs. The fixed input
should be bypassed with a 0.01 F ceramic capacitor. The
positive input should be driven with a 5V CMOS pat in
order to minimize the skew caused by the 3.3V threshold.
Figure 6c shows this configuration. Note that due to the
MC74AC04
–
+
LTC1518
LTC1519
1/4
Figure 6b. Techniques to Minimize Driver Ringing
10
1518/19 F06c
10pF
PC TRACE OR
10
DD
may be needed
0.01 F
PC TRACE
1518/19 F06b