LTC1659 Linear Technology, LTC1659 Datasheet - Page 6

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LTC1659

Manufacturer Part Number
LTC1659
Description
12-Bit Rail-to-Rail Micropower DAC in MSOP Package
Manufacturer
Linear Technology
Datasheet

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LTC1659
CLK (Pin 1): Serial Interface Clock. Internal Schmitt trig-
ger on this input allows direct optocoupler interface.
D
latched into the shift register on the rising edge of the serial
clock.
CS/LD (Pin 3): Serial Interface Enable and Load Control.
When CS/LD is low the CLK signal is enabled, so the data
can be clocked in. When CS/LD is pulled high, data is
loaded from the shift register into the DAC register,
updating the DAC output and the CLK is disabled
internally.
BLOCK
PIN
6
IN
U
(Pin 2): Serial Interface Data. Data on the D
FUNCTIONS
U
I D AGRA
CS/LD
D
CLK 1
OUT
D
IN
2
3
4
U
W
REGISTER
12-BIT
SHIFT
POWER-ON
RESET
REGISTER
IN
DAC
LD
pin is
D
Valid on the Rising Edge of the Serial Clock.
GND (Pin 5): Ground.
REF (Pin 6): Reference Input. This pin can be tied to V
The output will swing from 0V to REF. The typical input
resistance is 28k.
V
V
Requires a bypass capacitor to ground.
OUT
CC
OUT
12-BIT
(Pin 8): Positive Supply Input. 2.7V
DAC
(Pin 4): Output of the Shift Register which Becomes
(Pin 7): Buffered DAC Output.
+
6
5
8
7
1659 BD
V
V
REF
GND
OUT
CC
V
CC
5.5V.
CC
.

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