LTC1704 Linear Technology, LTC1704 Datasheet - Page 26

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LTC1704

Manufacturer Part Number
LTC1704
Description
550kHz Synchronous Switching Regulator Controller Plus Linear Regulator Controller
Manufacturer
Linear Technology
Datasheet

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APPLICATIO S I FOR ATIO
LTC1704/LTC1704B
reduces the available base current to minimize the I
V
current reduction depends on the REGFB pin voltage and
the R
Characteristics Curves). This current limit foldback scheme
limits the NPN power dissipation and prevents it from
blowing up. However, in cases when there is a constant
current load at the regulator output, this current limit
foldback scheme can create a start-up problem. In spite of
this, most applications do not have full load requirement
during start-up. To fulfill majority applications require-
ments, the LTC1704 linear regulator allows a small amount
of base current when the linear regulator output is shorted
or V
can be calculated from the following equation:
This short-circuit current should be checked against the
load requirement to allow proper start-up.
Linear Regulator Power Down
The linear regulator can be powered down easily. A pull-
down device (MOFF as shown in Figure 13) that is capable
of overcoming the REGILM pin 1.9 A weak pull-up current
can shut down the linear regulator. As shown in Figure 13,
if the resistor R
V
power down the linear regulator. When both the REGILM
and RUN/SS pins are forced low, LTC1704 enters shut-
down mode and the quiescent current is reduced to 75 A.
Linear Regulator Turn-On Delay
The external capacitor C
ground allows the REGILM pin to ramp up slowly and adds
26
CE
REGON
I
SH
REGFB
product across the pass transistor. The amount of
REGILM
to ground can overcome the pull-up current and
h
FE
= 0V. The actual regulator short-circuit current
resistance (refer to the Typical Performance
4 8
.
mA
REGILM
U
V
REGON
DELAY
R
is smaller than 400k, forcing
U
REGILM
– .
from the REGILM pin to
0 8
W
300
U
LOAD
a delay to the turn-on time of the linear regulator. The
current through the resistor R
current and the external capacitor C
REGILM pin slew rate. To power up the linear regulator,
the potential at the REGILM pin should not be below 0.8V.
To add power sequencing to the linear regulator is easy.
Once the current limit resistor R
capacitor C
delay using the following equation:
The actual turn-on delay, which includes the time for the
external NPN to charge the output capacitor, will be longer
than the calculated value.
The LTC1704 linear regulator turn-on delay circuit is
versatile; C
to allow instantaneous power up to seconds long delay.
Linear Regulator Output Bypass Capacitor
The linear regulator requires the use of an output capacitor
as part of the frequency compensation network. A mini-
mum output capacitor of 10 F with an ESR lower than
100m is recommended to prevent oscillations. Larger
values of output capacitance with low ESR should be used
to provide improved transient response for large load
current changes.
Many different types of capacitors are available and have
widely varying characteristics. These capacitors differ in
capacitor tolerance (sometimes ranging up to 100%),
equivalent series resistance, equivalent series inductance
and capacitance temperature coefficient. Low ESR tanta-
lum capacitors are recommended for this linear regulator.
t
DELAY
DELAY
DELAY
V
REGON
R
REGILM
capacitance should be larger than 100pF
0 8
can be added to program the turn on
. •
– .
C
0 8
DELAY
1 9
REGILM
.
A
REGILM
, the internal pull-up
DELAY
is chosen, the
controls the
1704bfa

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