LTC1735I-1 Linear Technology, LTC1735I-1 Datasheet - Page 10

• Manufacturer Part Number: LTC1735I-1
• Description: High Efficiency Synchronous Step-Down Switching Regulator
• Manufacturer: Linear Technology

OPERATIO
APPLICATIO S I FOR ATIO
LTC1735-1
POWER GOOD
A window comparator monitors the output voltage and its
open-drain output is pulled low when the divided down
output voltage (appearing at the V
During a programmed output voltage transition (i.e., a
transition from 1.55V to 1.3V) the PGOOD open-drain
output will be pulled low and Burst Mode operation will be
disabled until the output voltage is within 7.5% of its newly
programmed value.
When the PGOOD pin is driven by an external oscillator
through a series resistor, cycle-skipping operation is
invoked and the internal oscillator is synchronized to the
external clock by comparator C. In this mode, the 25%
minimum inductor current clamp is removed, providing
low noise, constant frequency discontinuous operation
The basic LTC1735-1 application circuit is shown in
Figure 1 on the first page of this data sheet. External
component selection is driven by the load requirement
and begins with the selection of R
is known, C
MOSFETs and D1 are selected. The operating frequency
and the inductor are chosen based largely on the desired
amount of ripple current. Finally, C
ability to handle the large RMS current into the converter
and C
output voltage ripple and transient specifications. The
circuit shown in Figure 1 can be configured for operation
up to an input voltage of 28V (limited by the external
MOSFETs).
R
R
The LTC1735-1 current comparator has a maximum
threshold of 75mV/R
range of SGND to 1.1(INTV
threshold sets the peak of the inductor current, yielding a
maximum average output current I
value less half the peak-to-peak ripple current, I
10
7.5% of the reference voltage of 0.8V.
SENSE
SENSE
OUT
Selection For Output Current
is chosen based on the required output current.
is chosen with low enough ESR to meet the
OSC
and L can be chosen. Next, the power
U
U
SENSE
(Refer to Functional Diagram)
U
and an input common mode
CC
). The current comparator
OSENSE
MAX
W
SENSE
IN
is selected for its
equal to the peak
pin) is not within
. Once R
U
L
.
SENSE
over the widest possible output current range. This con-
stant frequency operation is not quite as efficient as Burst
Mode operation, but does provide a lower noise, constant
frequency operation. When the power good window com-
parator indicates the output is not in regulation, the
PGOOD pin is pulled to ground and synchronization is
inhibited. Obviously when driving the PGOOD pin with an
external clock the power good indication is not available
unless additional circuitry is added.
If the PGOOD pin is tied to ground, continuous operation
is forced. This operation is the least efficient mode, but is
desirable in certain applications. The output can source
or sink current in this mode. When forcing continuous
operation and sinking current, current will be forced back
into the main power supply potentially boosting the input
supply to dangerous voltage levels—BEWARE.
Allowing a margin for variations in the LTC1735-1 and
external component values yields:
C
and Synchronization
The choice of operating frequency and inductor value is
a trade-off between efficiency and component size. Low
frequency operation improves efficiency by reducing
MOSFET switching losses, both gate charge loss and
transition loss. However, lower frequency operation
requires more inductance for a given amount of ripple
current.
The LTC1735-1 uses a constant frequency architecture
with the frequency determined by an external oscillator
capacitor C
the voltage on C
C
capacitor reaches 1.19V, C
process then repeats.
OSC
OSC
R
SENSE
is charged by a fixed current. When the voltage on the
Selection for Operating Frequency
OSC
50
I
MAX
. Each time the topside MOSFET turns on,
OSC
mV
is reset to ground. During the on-time,
OSC
is reset to ground. The