LTC1851 Linear Technology, LTC1851 Datasheet - Page 14

no-image

LTC1851

Manufacturer Part Number
LTC1851
Description
1.25Msps Sampling ADCs
Manufacturer
Linear Technology
Datasheet

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
LTC1851CFW
Manufacturer:
ABOV
Quantity:
270
Part Number:
LTC1851CFW
Manufacturer:
LT/凌特
Quantity:
20 000
Part Number:
LTC1851CFW#PBF
Manufacturer:
AD
Quantity:
21
Part Number:
LTC1851CFW#PBF
Manufacturer:
LINEAR
Quantity:
121
Part Number:
LTC1851IFW#PBF
Manufacturer:
LT
Quantity:
413
Part Number:
LTC1851IFW#PBF
Manufacturer:
LINEAR/凌特
Quantity:
20 000
www.DataSheet4U.com
APPLICATIO S I FOR ATIO
LTC1850/LTC1851
If two pure sine waves of frequencies fa and fb are applied
to the ADC input, nonlinearities in the ADC transfer func-
tion can create distortion products at the sum and differ-
ence frequencies of mfa nfb, where m and n = 0, 1, 2, 3,
etc. For example, the 2nd order IMD terms include (fa fb).
If the two input sine waves are equal in magnitude, the
value (in decibels) of the 2nd order IMD products can be
expressed by the following formula:
Peak Harmonic or Spurious Noise
The peak harmonic or spurious noise is the largest spec-
tral component excluding the input signal and DC. This
value is expressed in decibels relative to the RMS value of
a full-scale input signal.
Full-Power and Full-Linear Bandwidth
The full-power bandwidth is that input frequency at which
the amplitude of the reconstructed fundamental is
reduced by 3dB for a full-scale input signal.
The full-linear bandwidth is the input frequency at which
the S/(N + D) has dropped to 68dB for the LTC1851 (11
effective bits) or 56dB for the LTC1850 (9 effective bits).
The LTC1850/LTC1851 have been designed to optimize
input bandwidth, allowing the ADC to undersample input
signals with frequencies above the converter’s Nyquist
frequency. The noise floor stays very low at high frequen-
cies; S/(N + D) becomes dominated by distortion at
frequencies far beyond Nyquist.
ANALOG INPUT MULTIPLEXER
The analog input multiplexer is controlled using the single-
ended/differential pin (DIFF), three MUX address pins (A2,
A1, A0), the unipolar/bipolar pin (UNI/BIP) and the gain
select pin (PGA). The single-ended/differential pin (DIFF)
allows the user to configure the MUX as eight single-
ended channels relative to the analog input common pin
14
IMD fa fb
20
U
Log
U
Amplitude at fa fb
Amplitude at fa
W
U
(COM) when DIFF is low or as four differential pairs (CH0
and CH1, CH2 and CH3, CH4 and CH5, CH6 and CH7) when
DIFF is high. The channels (and polarity in the differential
case) are selected using the MUX address inputs as shown
in Table 1. Unused inputs (including the COM in the
differential case) should be grounded to prevent noise
coupling.
Table 1. Multiplexer Address Table
*Not used in differential mode. Connect to GND.
In addition to selecting the MUX channel, the LTC1850/
LTC1851 also allows the user to select between two gains
and unipolar or bipolar inputs for a total of four input
spans. PGA high selects a gain of 1 (the input span is equal
to the voltage on REFCOMP). PGA low selects a gain of 2
where the input span is equal to half of the voltage on
REFCOMP. UNI/BIP low selects a unipolar input span,
UNI/BIP high selects a bipolar input span. Table 2 summa-
rizes the possible input spans.
DIFF A2 A1 A0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM
DIFF A2 A1 A0 CH0 CH1 CH2 CH3 CH4 CH5 CH6 CH7 COM
MUX ADDRESS
MUX ADDRESS
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
+
+
SINGLE-ENDED CHANNEL SELECTION
DIFFERENTIAL CHANNEL SELECTION
+
+
+
+
+
+
+
+
+
+
+
+
+
+
18501f
*
*
*
*
*
*
*
*

Related parts for LTC1851